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FilmLED/TestDriverV1/TestDriverV1.dsn

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(pcb /home/hendrik/Schreibtisch/FilmLED/TestDriverV1/TestDriverV1.dsn
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8292.08 470.278 8375 0))
(outline (path signal 120 8555 0 8478.89 -480.521 8258.02 -914.006 7914.01 -1258.02
7480.52 -1478.89 7000 -1555 6519.48 -1478.89 6085.99 -1258.02
5741.98 -914.006 5521.11 -480.521 5445 0 5521.11 480.521
5741.98 914.006 6085.99 1258.02 6519.48 1478.89 7000 1555
7480.52 1478.89 7914.01 1258.02 8258.02 914.006 8478.89 480.521
8555 0))
(outline (path signal 100 -2100 3400 9100 3400))
(outline (path signal 100 9100 3400 9100 -3600))
(outline (path signal 100 9100 -3600 -600 -3600))
(outline (path signal 100 -600 -3600 -2100 -2100))
(outline (path signal 100 -2100 -2100 -2100 3400))
(outline (path signal 100 -2100 -2100 9100 -2100))
(outline (path signal 120 -2160 -2100 9160 -2100))
(outline (path signal 120 -2160 3460 9160 3460))
(outline (path signal 120 -2160 -3660 9160 -3660))
(outline (path signal 120 -2160 3460 -2160 -3660))
(outline (path signal 120 9160 3460 9160 -3660))
(outline (path signal 100 -1100 69 -69 69))
(outline (path signal 100 -69 69 -69 1100))
(outline (path signal 100 -69 1100 69 1100))
(outline (path signal 100 69 1100 69 69))
(outline (path signal 100 69 69 1100 69))
(outline (path signal 100 1100 69 1100 -69))
(outline (path signal 100 1100 -69 69 -69))
(outline (path signal 100 69 -69 69 -1100))
(outline (path signal 100 69 -1100 -69 -1100))
(outline (path signal 100 -69 -1100 -69 -69))
(outline (path signal 100 -69 -69 -1100 -69))
(outline (path signal 100 -1100 -69 -1100 69))
(outline (path signal 100 2400 69 3431 69))
(outline (path signal 100 3431 69 3431 1100))
(outline (path signal 100 3431 1100 3569 1100))
(outline (path signal 100 3569 1100 3569 69))
(outline (path signal 100 3569 69 4600 69))
(outline (path signal 100 4600 69 4600 -69))
(outline (path signal 100 4600 -69 3569 -69))
(outline (path signal 100 3569 -69 3569 -1100))
(outline (path signal 100 3569 -1100 3431 -1100))
(outline (path signal 100 3431 -1100 3431 -69))
(outline (path signal 100 3431 -69 2400 -69))
(outline (path signal 100 2400 -69 2400 69))
(outline (path signal 100 5900 69 6931 69))
(outline (path signal 100 6931 69 6931 1100))
(outline (path signal 100 6931 1100 7069 1100))
(outline (path signal 100 7069 1100 7069 69))
(outline (path signal 100 7069 69 8100 69))
(outline (path signal 100 8100 69 8100 -69))
(outline (path signal 100 8100 -69 7069 -69))
(outline (path signal 100 7069 -69 7069 -1100))
(outline (path signal 100 7069 -1100 6931 -1100))
(outline (path signal 100 6931 -1100 6931 -69))
(outline (path signal 100 6931 -69 5900 -69))
(outline (path signal 100 5900 -69 5900 69))
(outline (path signal 120 -2400 -2160 -2400 -3900))
(outline (path signal 120 -2400 -3900 -900 -3900))
(outline (path signal 50 -2600 3900 -2600 -4100))
(outline (path signal 50 -2600 -4100 9600 -4100))
(outline (path signal 50 9600 -4100 9600 3900))
(outline (path signal 50 9600 3900 -2600 3900))
(pin Rect[A]Pad_2400x2400_um 1 0 0)
(pin Round[A]Pad_2400_um 2 3500 0)
(pin Round[A]Pad_2400_um 3 7000 0)
)
(padstack Round[A]Pad_2340_um
(shape (circle F.Cu 2340))
(shape (circle B.Cu 2340))
(attach off)
)
(padstack Round[A]Pad_2400_um
(shape (circle F.Cu 2400))
(shape (circle B.Cu 2400))
(attach off)
)
(padstack Round[A]Pad_2997.2_um
(shape (circle F.Cu 2997.2))
(shape (circle B.Cu 2997.2))
(attach off)
)
(padstack Oval[A]Pad_1600x1600_um
(shape (path F.Cu 1600 0 0 0 0))
(shape (path B.Cu 1600 0 0 0 0))
(attach off)
)
(padstack Oval[A]Pad_1700x1700_um
(shape (path F.Cu 1700 0 0 0 0))
(shape (path B.Cu 1700 0 0 0 0))
(attach off)
)
(padstack Oval[A]Pad_1905x2000_um
(shape (path F.Cu 1905 0 -47.5 0 47.5))
(shape (path B.Cu 1905 0 -47.5 0 47.5))
(attach off)
)
(padstack Oval[A]Pad_3500x3500_um
(shape (path F.Cu 3500 0 0 0 0))
(shape (path B.Cu 3500 0 0 0 0))
(attach off)
)
(padstack Cust[T]Pad_1000x500_1000x_1500_23_um
(shape (polygon F.Cu 0 -500 250 -497.592 299.009 -478.47 395.142 -440.961 485.698
-386.505 567.197 -317.197 636.505 -235.698 690.961 -145.142 728.47
-49.009 747.592 0 750 500 750 500 -750 0 -750 -49.009 -747.592
-145.142 -728.47 -235.698 -690.961 -317.197 -636.505 -386.505 -567.197
-440.961 -485.698 -478.47 -395.142 -497.592 -299.009 -500 -250
-500 250))
(attach off)
)
(padstack Cust[T]Pad_1000x500_1050x_1500_23_um
(shape (polygon F.Cu 0 -500 250 -497.592 299.009 -478.47 395.142 -440.961 485.698
-386.505 567.197 -317.197 636.505 -235.698 690.961 -145.142 728.47
-49.009 747.592 0 750 550 750 550 -750 0 -750 -49.009 -747.592
-145.142 -728.47 -235.698 -690.961 -317.197 -636.505 -386.505 -567.197
-440.961 -485.698 -478.47 -395.142 -497.592 -299.009 -500 -250
-500 250))
(attach off)
)
(padstack Cust[T]Pad_1000x500_1000x_1500_23_um
(shape (polygon F.Cu 0 -500 750 0 750 49.009 747.592 145.142 728.47 235.698 690.961
317.197 636.505 386.505 567.197 440.961 485.698 478.47 395.142
497.592 299.009 500 250 500 -250 497.592 -299.009 478.47 -395.142
440.961 -485.698 386.505 -567.197 317.197 -636.505 235.698 -690.961
145.142 -728.47 49.009 -747.592 0 -750 -500 -750 -500 750))
(attach off)
)
(padstack Cust[T]Pad_1000x500_1050x_1500_23_um
(shape (polygon F.Cu 0 -550 750 0 750 49.009 747.592 145.142 728.47 235.698 690.961
317.197 636.505 386.505 567.197 440.961 485.698 478.47 395.142
497.592 299.009 500 250 500 -250 497.592 -299.009 478.47 -395.142
440.961 -485.698 386.505 -567.197 317.197 -636.505 235.698 -690.961
145.142 -728.47 49.009 -747.592 0 -750 -550 -750 -550 750))
(attach off)
)
(padstack RoundRect[T]Pad_975x1400_244.678_um
(shape (polygon F.Cu 0 286.238 697.211 327.435 686.172 366.089 668.147 401.026 643.684
431.184 613.526 455.647 578.589 473.672 539.935 484.711 498.738
488.428 456.25 488.428 -456.25 484.711 -498.738 473.672 -539.935
455.647 -578.589 431.184 -613.526 401.026 -643.684 366.089 -668.147
327.435 -686.172 286.238 -697.211 243.75 -700.928 -243.75 -700.928
-286.238 -697.211 -327.435 -686.172 -366.089 -668.147 -401.026 -643.684
-431.184 -613.526 -455.647 -578.589 -473.672 -539.935 -484.711 -498.738
-488.428 -456.25 -488.428 456.25 -484.711 498.738 -473.672 539.935
-455.647 578.589 -431.184 613.526 -401.026 643.684 -366.089 668.147
-327.435 686.172 -286.238 697.211 -243.75 700.928 243.75 700.928
286.238 697.211))
(attach off)
)
(padstack RoundRect[T]Pad_1325x2350_250.95_um
(shape (polygon F.Cu 0 456.078 1172.14 498.331 1160.82 537.976 1142.33 573.809 1117.24
604.74 1086.31 629.83 1050.48 648.317 1010.83 659.639 968.578
663.451 925.001 663.451 -925.001 659.639 -968.578 648.317 -1010.83
629.83 -1050.48 604.74 -1086.31 573.809 -1117.24 537.976 -1142.33
498.331 -1160.82 456.078 -1172.14 412.501 -1175.95 -412.501 -1175.95
-456.078 -1172.14 -498.331 -1160.82 -537.976 -1142.33 -573.809 -1117.24
-604.74 -1086.31 -629.83 -1050.48 -648.317 -1010.83 -659.639 -968.578
-663.451 -925.001 -663.451 925.001 -659.639 968.578 -648.317 1010.83
-629.83 1050.48 -604.74 1086.31 -573.809 1117.24 -537.976 1142.33
-498.331 1160.82 -456.078 1172.14 -412.501 1175.95 412.501 1175.95
456.078 1172.14))
(attach off)
)
(padstack RoundRect[T]Pad_2075x2350_250.951_um
(shape (polygon F.Cu 0 831.077 1172.14 873.33 1160.82 912.975 1142.33 948.808 1117.24
979.74 1086.31 1004.83 1050.48 1023.32 1010.83 1034.64 968.577
1038.45 925 1038.45 -925 1034.64 -968.577 1023.32 -1010.83
1004.83 -1050.47 979.74 -1086.31 948.808 -1117.24 912.976 -1142.33
873.33 -1160.82 831.077 -1172.14 787.5 -1175.95 -787.5 -1175.95
-831.077 -1172.14 -873.33 -1160.82 -912.975 -1142.33 -948.808 -1117.24
-979.74 -1086.31 -1004.83 -1050.48 -1023.32 -1010.83 -1034.64 -968.577
-1038.45 -925 -1038.45 925 -1034.64 968.577 -1023.32 1010.83
-1004.83 1050.47 -979.74 1086.31 -948.808 1117.24 -912.976 1142.33
-873.33 1160.82 -831.077 1172.14 -787.5 1175.95 787.5 1175.95
831.077 1172.14))
(attach off)
)
(padstack Rect[T]Pad_2200x800_um
(shape (rect F.Cu -1100 -400 1100 400))
(attach off)
)
(padstack Rect[A]Pad_2400x2400_um
(shape (rect F.Cu -1200 -1200 1200 1200))
(shape (rect B.Cu -1200 -1200 1200 1200))
(attach off)
)
(padstack Rect[T]Pad_2500x2300_um
(shape (rect F.Cu -1250 -1150 1250 1150))
(attach off)
)
(padstack Rect[T]Pad_2900x5400_um
(shape (rect F.Cu -1450 -2700 1450 2700))
(attach off)
)
(padstack Rect[T]Pad_6400x5800_um
(shape (rect F.Cu -3200 -2900 3200 2900))
(attach off)
)
(padstack Rect[T]Pad_1000x1500_um
(shape (rect F.Cu -500 -750 500 750))
(attach off)
)
(padstack Rect[T]Pad_1300.48x1998.98_um
(shape (rect F.Cu -650.24 -999.49 650.24 999.49))
(attach off)
)
(padstack Rect[A]Pad_1600x1600_um
(shape (rect F.Cu -800 -800 800 800))
(shape (rect B.Cu -800 -800 800 800))
(attach off)
)
(padstack Rect[A]Pad_1700x1700_um
(shape (rect F.Cu -850 -850 850 850))
(shape (rect B.Cu -850 -850 850 850))
(attach off)
)
(padstack Rect[A]Pad_1905x2000_um
(shape (rect F.Cu -952.5 -1000 952.5 1000))
(shape (rect B.Cu -952.5 -1000 952.5 1000))
(attach off)
)
(padstack Rect[T]Pad_1998.98x1998.98_um
(shape (rect F.Cu -999.49 -999.49 999.49 999.49))
(attach off)
)
(padstack "Via[0-1]_800:400_um"
(shape (circle F.Cu 800))
(shape (circle B.Cu 800))
(attach off)
)
(padstack "Via[0-1]_1000:600_um"
(shape (circle F.Cu 1000))
(shape (circle B.Cu 1000))
(attach off)
)
)
(network
(net GND
(pins J4-2 C1-2 C2-2 C3-2 C4-2 C5-2 C6-2 C7-2 C8-2 C9-2 C10-2 C11-2 C12-2 C13-2
C14-2 C15-2 C16-2 D1-2 D2-2 D3-2 D4-2 J2-2 J3-2 RV1-3 RV1-2 RV2-2 RV2-3 RV4-2
RV4-3 RV7-3 RV7-2 U5-3 U5-3@1 U6-3 U6-3@1 U7-3 U7-3@1 U8-3 U8-3@1 J1-3)
)
(net "Net-(C1-Pad1)"
(pins C1-1 JP1-2 U1-3)
)
(net "Net-(C2-Pad1)"
(pins C2-1 JP2-2 U2-3)
)
(net "Net-(C3-Pad1)"
(pins C3-1 JP3-2 U3-3)
)
(net "Net-(C4-Pad1)"
(pins C4-1 JP4-2 U4-3)
)
(net VPSU01
(pins C5-1 C9-1 RV3-2 RV3-1 SW1-1 SW1-2 SW1-3 U1-2 U5-1)
)
(net VPSU02
(pins C6-1 C10-1 RV5-1 RV5-2 SW2-1 SW2-2 SW2-3 U2-2 U6-1)
)
(net VPSU03
(pins C7-1 C11-1 RV6-1 RV6-2 SW3-3 SW3-2 SW3-1 U3-2 U7-1)
)
(net VPSU04
(pins C8-1 C12-1 RV8-2 RV8-1 SW4-3 SW4-2 SW4-1 U4-2 U8-1)
)
(net "Net-(C13-Pad1)"
(pins C13-1 U5-5)
)
(net "Net-(C14-Pad1)"
(pins C14-1 U6-5)
)
(net "Net-(C15-Pad1)"
(pins C15-1 U7-5)
)
(net "Net-(C16-Pad1)"
(pins C16-1 U8-5)
)
(net "Net-(D1-Pad1)"
(pins D1-1 L1-1 U5-4)
)
(net "Net-(D2-Pad1)"
(pins D2-1 L2-1 U6-4)
)
(net "Net-(D3-Pad1)"
(pins D3-1 L3-1 U7-4)
)
(net "Net-(D4-Pad1)"
(pins D4-1 L4-1 U8-4)
)
(net LED01
(pins J2-1 JP7-2 J1-2)
)
(net LED02
(pins J3-1 JP8-2 J1-1)
)
(net "Net-(J4-Pad1)"
(pins J4-1 SW5-1)
)
(net RawVoltage
(pins JP1-1 JP2-1 JP3-1 JP4-1 SW5-2)
)
(net "Net-(JP5-Pad2)"
(pins JP5-2 RV5-3 U2-1)
)
(net "Net-(JP5-Pad3)"
(pins JP5-3 RV1-1)
)
(net vari01
(pins JP5-1 RV3-3 RV4-1 U1-1)
)
(net vari02
(pins JP6-1 RV6-3 RV7-1 U3-1)
)
(net "Net-(JP6-Pad3)"
(pins JP6-3 RV2-1)
)
(net "Net-(JP6-Pad2)"
(pins JP6-2 RV8-3 U4-1)
)
(net VDRIVER01
(pins JP7-1 L1-2)
)
(net VDRIVER02
(pins JP7-3 L2-2)
)
(net VDRIVER04
(pins JP8-3 L4-2)
)
(net VDRIVER03
(pins JP8-1 L3-2)
)
(net "Net-(R1-Pad2)"
(pins R1-2 R2-2 R9-2 U5-2)
)
(net "Net-(R1-Pad1)"
(pins R1-1 SW1-6)
)
(net "Net-(R2-Pad1)"
(pins R2-1 SW1-4)
)
(net "Net-(R3-Pad1)"
(pins R3-1 SW2-6)
)
(net "Net-(R10-Pad2)"
(pins R3-2 R4-2 R10-2 U6-2)
)
(net "Net-(R4-Pad1)"
(pins R4-1 SW2-4)
)
(net "Net-(R11-Pad2)"
(pins R5-2 R6-2 R11-2 U7-2)
)
(net "Net-(R5-Pad1)"
(pins R5-1 SW3-6)
)
(net "Net-(R6-Pad1)"
(pins R6-1 SW3-4)
)
(net "Net-(R12-Pad2)"
(pins R7-2 R8-2 R12-2 U8-2)
)
(net "Net-(R7-Pad1)"
(pins R7-1 SW4-6)
)
(net "Net-(R8-Pad1)"
(pins R8-1 SW4-4)
)
(net "Net-(R9-Pad1)"
(pins R9-1 SW1-5)
)
(net "Net-(R10-Pad1)"
(pins R10-1 SW2-5)
)
(net "Net-(R11-Pad1)"
(pins R11-1 SW3-5)
)
(net "Net-(R12-Pad1)"
(pins R12-1 SW4-5)
)
(class kicad_default "" "Net-(C13-Pad1)" "Net-(C14-Pad1)" "Net-(C15-Pad1)"
"Net-(C16-Pad1)" "Net-(JP5-Pad3)" "Net-(JP6-Pad3)" "Net-(R1-Pad1)" "Net-(R1-Pad2)"
"Net-(R10-Pad1)" "Net-(R10-Pad2)" "Net-(R11-Pad1)" "Net-(R11-Pad2)"
"Net-(R12-Pad1)" "Net-(R12-Pad2)" "Net-(R2-Pad1)" "Net-(R3-Pad1)" "Net-(R4-Pad1)"
"Net-(R5-Pad1)" "Net-(R6-Pad1)" "Net-(R7-Pad1)" "Net-(R8-Pad1)" "Net-(R9-Pad1)"
(circuit
(use_via Via[0-1]_800:400_um)
)
(rule
(width 250)
(clearance 200.1)
)
)
(class Power GND LED01 LED02 "Net-(C1-Pad1)" "Net-(C2-Pad1)" "Net-(C3-Pad1)"
"Net-(C4-Pad1)" "Net-(D1-Pad1)" "Net-(D2-Pad1)" "Net-(D3-Pad1)" "Net-(D4-Pad1)"
"Net-(J4-Pad1)" "Net-(JP5-Pad2)" "Net-(JP6-Pad2)" RawVoltage VDRIVER01
VDRIVER02 VDRIVER03 VDRIVER04 VPSU01 VPSU02 VPSU03 VPSU04 vari01 vari02
(circuit
(use_via Via[0-1]_1000:600_um)
)
(rule
(width 1200)
(clearance 200.1)
)
)
)
(wiring
)
)
Reference in New Issue View Git Blame Copy Permalink