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Macros</h2></td></tr>
<tr class="memitem:add0bdbfef5abf241c7774f68bde42f1d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#add0bdbfef5abf241c7774f68bde42f1d">portCHAR</a>   char</td></tr>
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<tr class="memitem:a1bbe1ef117ec274ef919e0a930c888ac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a1bbe1ef117ec274ef919e0a930c888ac">portFLOAT</a>   float</td></tr>
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<tr class="memitem:a4711ce186a903a14bc8ea7c8650b4f61"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a4711ce186a903a14bc8ea7c8650b4f61">portDOUBLE</a>   double</td></tr>
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<tr class="memitem:a6bbebff6020ac333ab6ec2ffd7f77001"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a6bbebff6020ac333ab6ec2ffd7f77001">portLONG</a>   long</td></tr>
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<tr class="memitem:a42e62d5881b12ff2a5c659576c64d003"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a42e62d5881b12ff2a5c659576c64d003">portSHORT</a>   short</td></tr>
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<tr class="memitem:ab0a294066ac7369b8f59a52d9491a92c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#ab0a294066ac7369b8f59a52d9491a92c">portSTACK_TYPE</a>   uint32_t</td></tr>
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<tr class="memitem:a1ebe82d24d764ae4e352f7c3a9f92c01"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a1ebe82d24d764ae4e352f7c3a9f92c01">portBASE_TYPE</a>   long</td></tr>
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<tr class="memitem:a72723ba1e4a85ca14f25c2b9e066613d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a72723ba1e4a85ca14f25c2b9e066613d">portMAX_DELAY</a>   ( <a class="el" href="portmacro_8h.html#aa69c48c6e902ce54f70886e6573c92a9">TickType_t</a> ) 0xffffffffUL</td></tr>
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<tr class="memitem:a62e53bc6d3fa5c4bf4e65ab2752930f3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a62e53bc6d3fa5c4bf4e65ab2752930f3">portTICK_TYPE_IS_ATOMIC</a>   1</td></tr>
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<tr class="memitem:a21adaab1601f6a0f35ba550a43060830"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a21adaab1601f6a0f35ba550a43060830">portSTACK_GROWTH</a>   ( -1 )</td></tr>
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<tr class="memitem:a554d9322ce7f698a86a22b21234bd8cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a554d9322ce7f698a86a22b21234bd8cd">portTICK_PERIOD_MS</a>   ( ( <a class="el" href="portmacro_8h.html#aa69c48c6e902ce54f70886e6573c92a9">TickType_t</a> ) 1000 / <a class="el" href="_free_r_t_o_s_config_8h.html#a2f0258dd1e3b877e5bc013be54c2db6a">configTICK_RATE_HZ</a> )</td></tr>
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<tr class="memitem:ab9091ce3940d8bd93ec850122a2c6a1c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#ab9091ce3940d8bd93ec850122a2c6a1c">portBYTE_ALIGNMENT</a>   8</td></tr>
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<tr class="memitem:a6e3fcd078a96185dea9b8ed5dd10db44"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a6e3fcd078a96185dea9b8ed5dd10db44">portSY_FULL_READ_WRITE</a>   ( 15 )</td></tr>
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<tr class="memitem:ae1ff06193615f5130b5a97dc9e708fc7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#ae1ff06193615f5130b5a97dc9e708fc7">portYIELD</a>()</td></tr>
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<tr class="memitem:ae42817ecbd6fe76d846a89cc0fcd0d95"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#ae42817ecbd6fe76d846a89cc0fcd0d95">portNVIC_INT_CTRL_REG</a>   ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )</td></tr>
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<tr class="memitem:a16830bf8349e14cdeed05193af234d5e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a16830bf8349e14cdeed05193af234d5e">portNVIC_PENDSVSET_BIT</a>   ( 1UL << 28UL )</td></tr>
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<tr class="memitem:a63b994040c62c9685490a71c87a13d8a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a63b994040c62c9685490a71c87a13d8a">portEND_SWITCHING_ISR</a>(xSwitchRequired)   if( xSwitchRequired != <a class="el" href="projdefs_8h.html#aa56260e937e7e203026707e5ba944273">pdFALSE</a> ) <a class="el" href="portmacro_8h.html#ae1ff06193615f5130b5a97dc9e708fc7">portYIELD</a>()</td></tr>
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<tr class="memitem:aac6850c66595efdc02a8bbb95fb4648e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#aac6850c66595efdc02a8bbb95fb4648e">portYIELD_FROM_ISR</a>(x)   <a class="el" href="portmacro_8h.html#a63b994040c62c9685490a71c87a13d8a">portEND_SWITCHING_ISR</a>( x )</td></tr>
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<tr class="memitem:a6e3d10ee1a0734a647ca192523c2cfc1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a6e3d10ee1a0734a647ca192523c2cfc1">portDISABLE_INTERRUPTS</a>()   <a class="el" href="portmacro_8h.html#a9021d55b208c59fc725af4e7c330a417">vPortRaiseBASEPRI</a>()</td></tr>
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<tr class="memitem:abc47e85a6befbb47961ad5ee7aa57173"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#abc47e85a6befbb47961ad5ee7aa57173">portENABLE_INTERRUPTS</a>()   <a class="el" href="portmacro_8h.html#aa91c969157d79120a26ea3531474e3f5">vPortSetBASEPRI</a>( 0 )</td></tr>
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<tr class="memitem:a8a09321ad004019f3c8d0f2e4d7224c7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a8a09321ad004019f3c8d0f2e4d7224c7">portENTER_CRITICAL</a>()   <a class="el" href="portmacro_8h.html#a2ed3554a3de09a3bd09d396ee081ab69">vPortEnterCritical</a>()</td></tr>
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<tr class="memitem:a529358e6147881dd881c890ade21c9bd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a529358e6147881dd881c890ade21c9bd">portEXIT_CRITICAL</a>()   <a class="el" href="portmacro_8h.html#aed20ada05b957181a0de042802a82a5b">vPortExitCritical</a>()</td></tr>
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<tr class="memitem:a31b4260dbc1823ba80b578f86eb15a98"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a31b4260dbc1823ba80b578f86eb15a98">portSET_INTERRUPT_MASK_FROM_ISR</a>()   <a class="el" href="portmacro_8h.html#a1ae9e6953da44984c5595ad82b3c0af3">ulPortRaiseBASEPRI</a>()</td></tr>
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<tr class="memitem:a79d65a5d0f6f9133a0739832e9d8367e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a79d65a5d0f6f9133a0739832e9d8367e">portCLEAR_INTERRUPT_MASK_FROM_ISR</a>(x)   <a class="el" href="portmacro_8h.html#aa91c969157d79120a26ea3531474e3f5">vPortSetBASEPRI</a>(x)</td></tr>
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<tr class="memitem:a1dcf4bd9c1ad4fe16a71391dd95cf585"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a1dcf4bd9c1ad4fe16a71391dd95cf585">portSUPPRESS_TICKS_AND_SLEEP</a>(xExpectedIdleTime)   <a class="el" href="portmacro_8h.html#aefd025907402b0b863d5012673d5036e">vPortSuppressTicksAndSleep</a>( xExpectedIdleTime )</td></tr>
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<tr class="memitem:aebb8c3a87d591f60f974772be0ee798d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#aebb8c3a87d591f60f974772be0ee798d">configUSE_PORT_OPTIMISED_TASK_SELECTION</a>   1</td></tr>
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<tr class="memitem:a113cd9b8401284194da8ddc4569aa484"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a113cd9b8401284194da8ddc4569aa484">portRECORD_READY_PRIORITY</a>(uxPriority, uxReadyPriorities)   ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )</td></tr>
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<tr class="memitem:aab771d12c0912d93d52a586628fb18a6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#aab771d12c0912d93d52a586628fb18a6">portRESET_READY_PRIORITY</a>(uxPriority, uxReadyPriorities)   ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )</td></tr>
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<tr class="memitem:a5ed536be98084ed8c77c95d79a2688ee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a5ed536be98084ed8c77c95d79a2688ee">portGET_HIGHEST_PRIORITY</a>(uxTopPriority, uxReadyPriorities)   uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )</td></tr>
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<tr class="memitem:a2921e1c5a1f974dfa01ae44d1f665f14"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a2921e1c5a1f974dfa01ae44d1f665f14">portTASK_FUNCTION_PROTO</a>(vFunction, pvParameters)   void vFunction( void *pvParameters )</td></tr>
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<tr class="memitem:a3a289793652f505c538abea27045ccdf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a3a289793652f505c538abea27045ccdf">portTASK_FUNCTION</a>(vFunction, pvParameters)   void vFunction( void *pvParameters )</td></tr>
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<tr class="memitem:a23c54dff0b50ff35563ef06c6d6d1835"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a23c54dff0b50ff35563ef06c6d6d1835">portNOP</a>()</td></tr>
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<tr class="memitem:a73448585c9c9e96500c2f0c9ea824601"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a73448585c9c9e96500c2f0c9ea824601">portINLINE</a>   __inline</td></tr>
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<tr class="memitem:aaa356ca7932487d20a42d6839842d308"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#aaa356ca7932487d20a42d6839842d308">portFORCE_INLINE</a>   __forceinline</td></tr>
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Typedefs</h2></td></tr>
<tr class="memitem:a84e9a8ba132feed0b2401c1f4e2ac63c"><td class="memItemLeft" align="right" valign="top">typedef <a class="el" href="portmacro_8h.html#ab0a294066ac7369b8f59a52d9491a92c">portSTACK_TYPE</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a84e9a8ba132feed0b2401c1f4e2ac63c">StackType_t</a></td></tr>
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<tr class="memitem:a46fb21e00ae0729d7515c0fbf2269796"><td class="memItemLeft" align="right" valign="top">typedef long </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a46fb21e00ae0729d7515c0fbf2269796">BaseType_t</a></td></tr>
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<tr class="memitem:a646f89d4298e4f5afd522202b11cb2e6"><td class="memItemLeft" align="right" valign="top">typedef unsigned long </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a646f89d4298e4f5afd522202b11cb2e6">UBaseType_t</a></td></tr>
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<tr class="memitem:aa69c48c6e902ce54f70886e6573c92a9"><td class="memItemLeft" align="right" valign="top">typedef uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#aa69c48c6e902ce54f70886e6573c92a9">TickType_t</a></td></tr>
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Functions</h2></td></tr>
<tr class="memitem:a2ed3554a3de09a3bd09d396ee081ab69"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a2ed3554a3de09a3bd09d396ee081ab69">vPortEnterCritical</a> (void)</td></tr>
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<tr class="memitem:aed20ada05b957181a0de042802a82a5b"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#aed20ada05b957181a0de042802a82a5b">vPortExitCritical</a> (void)</td></tr>
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<tr class="memitem:aefd025907402b0b863d5012673d5036e"><td class="memItemLeft" align="right" valign="top">void </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#aefd025907402b0b863d5012673d5036e">vPortSuppressTicksAndSleep</a> (<a class="el" href="portmacro_8h.html#aa69c48c6e902ce54f70886e6573c92a9">TickType_t</a> xExpectedIdleTime)</td></tr>
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<tr class="memitem:aa91c969157d79120a26ea3531474e3f5"><td class="memItemLeft" align="right" valign="top">static <a class="el" href="portmacro_8h.html#aaa356ca7932487d20a42d6839842d308">portFORCE_INLINE</a> void </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#aa91c969157d79120a26ea3531474e3f5">vPortSetBASEPRI</a> (uint32_t ulBASEPRI)</td></tr>
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<tr class="memitem:a9021d55b208c59fc725af4e7c330a417"><td class="memItemLeft" align="right" valign="top">static <a class="el" href="portmacro_8h.html#aaa356ca7932487d20a42d6839842d308">portFORCE_INLINE</a> void </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a9021d55b208c59fc725af4e7c330a417">vPortRaiseBASEPRI</a> (void)</td></tr>
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<tr class="memitem:a6758106ef1bbb877377317138834427e"><td class="memItemLeft" align="right" valign="top">static <a class="el" href="portmacro_8h.html#aaa356ca7932487d20a42d6839842d308">portFORCE_INLINE</a> void </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a6758106ef1bbb877377317138834427e">vPortClearBASEPRIFromISR</a> (void)</td></tr>
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<tr class="memitem:a1ae9e6953da44984c5595ad82b3c0af3"><td class="memItemLeft" align="right" valign="top">static <a class="el" href="portmacro_8h.html#aaa356ca7932487d20a42d6839842d308">portFORCE_INLINE</a> uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a1ae9e6953da44984c5595ad82b3c0af3">ulPortRaiseBASEPRI</a> (void)</td></tr>
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<tr class="memitem:a6a9be2aa97aac4e7f03fe386f9281b9a"><td class="memItemLeft" align="right" valign="top">static <a class="el" href="portmacro_8h.html#aaa356ca7932487d20a42d6839842d308">portFORCE_INLINE</a> <a class="el" href="portmacro_8h.html#a46fb21e00ae0729d7515c0fbf2269796">BaseType_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="portmacro_8h.html#a6a9be2aa97aac4e7f03fe386f9281b9a">xPortIsInsideInterrupt</a> (void)</td></tr>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#aebb8c3a87d591f60f974772be0ee798d">◆ </a></span>configUSE_PORT_OPTIMISED_TASK_SELECTION</h2>
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<td class="memname">#define configUSE_PORT_OPTIMISED_TASK_SELECTION   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a1ebe82d24d764ae4e352f7c3a9f92c01">◆ </a></span>portBASE_TYPE</h2>
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<td class="memname">#define portBASE_TYPE   long</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ab9091ce3940d8bd93ec850122a2c6a1c">◆ </a></span>portBYTE_ALIGNMENT</h2>
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<td class="memname">#define portBYTE_ALIGNMENT   8</td>
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<h2 class="memtitle"><span class="permalink"><a href="#add0bdbfef5abf241c7774f68bde42f1d">◆ </a></span>portCHAR</h2>
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<td class="memname">#define portCHAR   char</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a79d65a5d0f6f9133a0739832e9d8367e">◆ </a></span>portCLEAR_INTERRUPT_MASK_FROM_ISR</h2>
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<td class="memname">#define portCLEAR_INTERRUPT_MASK_FROM_ISR</td>
<td>(</td>
<td class="paramtype"> </td>
<td class="paramname">x</td><td>)</td>
<td>   <a class="el" href="portmacro_8h.html#aa91c969157d79120a26ea3531474e3f5">vPortSetBASEPRI</a>(x)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a6e3d10ee1a0734a647ca192523c2cfc1">◆ </a></span>portDISABLE_INTERRUPTS</h2>
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<td class="memname">#define portDISABLE_INTERRUPTS</td>
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<td>   <a class="el" href="portmacro_8h.html#a9021d55b208c59fc725af4e7c330a417">vPortRaiseBASEPRI</a>()</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a4711ce186a903a14bc8ea7c8650b4f61">◆ </a></span>portDOUBLE</h2>
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<td class="memname">#define portDOUBLE   double</td>
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<h2 class="memtitle"><span class="permalink"><a href="#abc47e85a6befbb47961ad5ee7aa57173">◆ </a></span>portENABLE_INTERRUPTS</h2>
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<td class="memname">#define portENABLE_INTERRUPTS</td>
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<td>   <a class="el" href="portmacro_8h.html#aa91c969157d79120a26ea3531474e3f5">vPortSetBASEPRI</a>( 0 )</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a63b994040c62c9685490a71c87a13d8a">◆ </a></span>portEND_SWITCHING_ISR</h2>
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<td class="memname">#define portEND_SWITCHING_ISR</td>
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<td class="paramname">xSwitchRequired</td><td>)</td>
<td>   if( xSwitchRequired != <a class="el" href="projdefs_8h.html#aa56260e937e7e203026707e5ba944273">pdFALSE</a> ) <a class="el" href="portmacro_8h.html#ae1ff06193615f5130b5a97dc9e708fc7">portYIELD</a>()</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a8a09321ad004019f3c8d0f2e4d7224c7">◆ </a></span>portENTER_CRITICAL</h2>
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<td class="memname">#define portENTER_CRITICAL</td>
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<td>   <a class="el" href="portmacro_8h.html#a2ed3554a3de09a3bd09d396ee081ab69">vPortEnterCritical</a>()</td>
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<td class="memname">#define portEXIT_CRITICAL</td>
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<td>   <a class="el" href="portmacro_8h.html#aed20ada05b957181a0de042802a82a5b">vPortExitCritical</a>()</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a1bbe1ef117ec274ef919e0a930c888ac">◆ </a></span>portFLOAT</h2>
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<td class="memname">#define portFLOAT   float</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aaa356ca7932487d20a42d6839842d308">◆ </a></span>portFORCE_INLINE</h2>
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<td class="memname">#define portFORCE_INLINE   __forceinline</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a5ed536be98084ed8c77c95d79a2688ee">◆ </a></span>portGET_HIGHEST_PRIORITY</h2>
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<td class="memname">#define portGET_HIGHEST_PRIORITY</td>
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<td></td><td>   uxTopPriority = ( 31UL - ( uint32_t ) __clz( ( uxReadyPriorities ) ) )</td>
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<td class="memname">#define portINLINE   __inline</td>
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<td class="memname">#define portLONG   long</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a72723ba1e4a85ca14f25c2b9e066613d">◆ </a></span>portMAX_DELAY</h2>
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<td class="memname">#define portMAX_DELAY   ( <a class="el" href="portmacro_8h.html#aa69c48c6e902ce54f70886e6573c92a9">TickType_t</a> ) 0xffffffffUL</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a23c54dff0b50ff35563ef06c6d6d1835">◆ </a></span>portNOP</h2>
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<td class="memname">#define portNVIC_INT_CTRL_REG   ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a16830bf8349e14cdeed05193af234d5e">◆ </a></span>portNVIC_PENDSVSET_BIT</h2>
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<td class="memname">#define portNVIC_PENDSVSET_BIT   ( 1UL << 28UL )</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a113cd9b8401284194da8ddc4569aa484">◆ </a></span>portRECORD_READY_PRIORITY</h2>
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<td class="memname">#define portRECORD_READY_PRIORITY</td>
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<td></td><td>   ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aab771d12c0912d93d52a586628fb18a6">◆ </a></span>portRESET_READY_PRIORITY</h2>
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<td class="memname">#define portRESET_READY_PRIORITY</td>
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<td></td><td>   ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a31b4260dbc1823ba80b578f86eb15a98">◆ </a></span>portSET_INTERRUPT_MASK_FROM_ISR</h2>
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<td class="memname">#define portSET_INTERRUPT_MASK_FROM_ISR</td>
<td>(</td>
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<td>   <a class="el" href="portmacro_8h.html#a1ae9e6953da44984c5595ad82b3c0af3">ulPortRaiseBASEPRI</a>()</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a42e62d5881b12ff2a5c659576c64d003">◆ </a></span>portSHORT</h2>
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<td class="memname">#define portSHORT   short</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a21adaab1601f6a0f35ba550a43060830">◆ </a></span>portSTACK_GROWTH</h2>
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<td class="memname">#define portSTACK_GROWTH   ( -1 )</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ab0a294066ac7369b8f59a52d9491a92c">◆ </a></span>portSTACK_TYPE</h2>
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<td class="memname">#define portSTACK_TYPE   uint32_t</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a1dcf4bd9c1ad4fe16a71391dd95cf585">◆ </a></span>portSUPPRESS_TICKS_AND_SLEEP</h2>
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<td class="memname">#define portSUPPRESS_TICKS_AND_SLEEP</td>
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<td class="paramtype"> </td>
<td class="paramname">xExpectedIdleTime</td><td>)</td>
<td>   <a class="el" href="portmacro_8h.html#aefd025907402b0b863d5012673d5036e">vPortSuppressTicksAndSleep</a>( xExpectedIdleTime )</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a6e3fcd078a96185dea9b8ed5dd10db44">◆ </a></span>portSY_FULL_READ_WRITE</h2>
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<td class="memname">#define portSY_FULL_READ_WRITE   ( 15 )</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3a289793652f505c538abea27045ccdf">◆ </a></span>portTASK_FUNCTION</h2>
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<td class="memname">#define portTASK_FUNCTION</td>
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<td class="paramtype"> </td>
<td class="paramname">vFunction, </td>
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<td class="paramkey"></td>
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<td class="paramtype"> </td>
<td class="paramname">pvParameters </td>
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<td></td><td>   void vFunction( void *pvParameters )</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2921e1c5a1f974dfa01ae44d1f665f14">◆ </a></span>portTASK_FUNCTION_PROTO</h2>
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<td class="memname">#define portTASK_FUNCTION_PROTO</td>
<td>(</td>
<td class="paramtype"> </td>
<td class="paramname">vFunction, </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"> </td>
<td class="paramname">pvParameters </td>
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<td>)</td>
<td></td><td>   void vFunction( void *pvParameters )</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a554d9322ce7f698a86a22b21234bd8cd">◆ </a></span>portTICK_PERIOD_MS</h2>
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<td class="memname">#define portTICK_PERIOD_MS   ( ( <a class="el" href="portmacro_8h.html#aa69c48c6e902ce54f70886e6573c92a9">TickType_t</a> ) 1000 / <a class="el" href="_free_r_t_o_s_config_8h.html#a2f0258dd1e3b877e5bc013be54c2db6a">configTICK_RATE_HZ</a> )</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a62e53bc6d3fa5c4bf4e65ab2752930f3">◆ </a></span>portTICK_TYPE_IS_ATOMIC</h2>
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<td class="memname">#define portTICK_TYPE_IS_ATOMIC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ae1ff06193615f5130b5a97dc9e708fc7">◆ </a></span>portYIELD</h2>
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<td class="memname">#define portYIELD</td>
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<b>Value:</b><div class="fragment"><div class="line">{ \</div>
<div class="line"> <span class="comment">/* Set a PendSV to request a context switch. */</span> \</div>
<div class="line"> portNVIC_INT_CTRL_REG = <a class="code" href="portmacro_8h.html#a16830bf8349e14cdeed05193af234d5e">portNVIC_PENDSVSET_BIT</a>; \</div>
<div class="line"> \</div>
<div class="line"> <span class="comment">/* Barriers are normally not required but do ensure the code is completely \</span></div>
<div class="line"><span class="comment"> within the specified behaviour for the architecture. */</span> \</div>
<div class="line"> __dsb( <a class="code" href="portmacro_8h.html#a6e3fcd078a96185dea9b8ed5dd10db44">portSY_FULL_READ_WRITE</a> ); \</div>
<div class="line"> __isb( <a class="code" href="portmacro_8h.html#a6e3fcd078a96185dea9b8ed5dd10db44">portSY_FULL_READ_WRITE</a> ); \</div>
<div class="line">}</div>
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<h2 class="memtitle"><span class="permalink"><a href="#aac6850c66595efdc02a8bbb95fb4648e">◆ </a></span>portYIELD_FROM_ISR</h2>
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<td class="memname">#define portYIELD_FROM_ISR</td>
<td>(</td>
<td class="paramtype"> </td>
<td class="paramname">x</td><td>)</td>
<td>   <a class="el" href="portmacro_8h.html#a63b994040c62c9685490a71c87a13d8a">portEND_SWITCHING_ISR</a>( x )</td>
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<h2 class="groupheader">Typedef Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a46fb21e00ae0729d7515c0fbf2269796">◆ </a></span>BaseType_t</h2>
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<td class="memname">typedef long <a class="el" href="portmacro_8h.html#a46fb21e00ae0729d7515c0fbf2269796">BaseType_t</a></td>
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<h2 class="memtitle"><span class="permalink"><a href="#a84e9a8ba132feed0b2401c1f4e2ac63c">◆ </a></span>StackType_t</h2>
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<td class="memname">typedef <a class="el" href="portmacro_8h.html#ab0a294066ac7369b8f59a52d9491a92c">portSTACK_TYPE</a> <a class="el" href="portmacro_8h.html#a84e9a8ba132feed0b2401c1f4e2ac63c">StackType_t</a></td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa69c48c6e902ce54f70886e6573c92a9">◆ </a></span>TickType_t</h2>
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<td class="memname">typedef uint32_t <a class="el" href="portmacro_8h.html#aa69c48c6e902ce54f70886e6573c92a9">TickType_t</a></td>
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<h2 class="memtitle"><span class="permalink"><a href="#a646f89d4298e4f5afd522202b11cb2e6">◆ </a></span>UBaseType_t</h2>
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<td class="memname">typedef unsigned long <a class="el" href="portmacro_8h.html#a646f89d4298e4f5afd522202b11cb2e6">UBaseType_t</a></td>
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<h2 class="groupheader">Function Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a1ae9e6953da44984c5595ad82b3c0af3">◆ </a></span>ulPortRaiseBASEPRI()</h2>
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<td class="memname">static <a class="el" href="portmacro_8h.html#aaa356ca7932487d20a42d6839842d308">portFORCE_INLINE</a> uint32_t ulPortRaiseBASEPRI </td>
<td>(</td>
<td class="paramtype">void </td>
<td class="paramname"></td><td>)</td>
<td></td>
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<span class="mlabels"><span class="mlabel">static</span></span> </td>
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<h2 class="memtitle"><span class="permalink"><a href="#a6758106ef1bbb877377317138834427e">◆ </a></span>vPortClearBASEPRIFromISR()</h2>
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<td class="memname">static <a class="el" href="portmacro_8h.html#aaa356ca7932487d20a42d6839842d308">portFORCE_INLINE</a> void vPortClearBASEPRIFromISR </td>
<td>(</td>
<td class="paramtype">void </td>
<td class="paramname"></td><td>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2ed3554a3de09a3bd09d396ee081ab69">◆ </a></span>vPortEnterCritical()</h2>
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<td class="memname">void vPortEnterCritical </td>
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<td class="paramtype">void </td>
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<h2 class="memtitle"><span class="permalink"><a href="#aed20ada05b957181a0de042802a82a5b">◆ </a></span>vPortExitCritical()</h2>
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<td class="memname">void vPortExitCritical </td>
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<td class="paramtype">void </td>
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<h2 class="memtitle"><span class="permalink"><a href="#a9021d55b208c59fc725af4e7c330a417">◆ </a></span>vPortRaiseBASEPRI()</h2>
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<td class="memname">static <a class="el" href="portmacro_8h.html#aaa356ca7932487d20a42d6839842d308">portFORCE_INLINE</a> void vPortRaiseBASEPRI </td>
<td>(</td>
<td class="paramtype">void </td>
<td class="paramname"></td><td>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa91c969157d79120a26ea3531474e3f5">◆ </a></span>vPortSetBASEPRI()</h2>
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<td class="memname">static <a class="el" href="portmacro_8h.html#aaa356ca7932487d20a42d6839842d308">portFORCE_INLINE</a> void vPortSetBASEPRI </td>
<td>(</td>
<td class="paramtype">uint32_t </td>
<td class="paramname"><em>ulBASEPRI</em></td><td>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aefd025907402b0b863d5012673d5036e">◆ </a></span>vPortSuppressTicksAndSleep()</h2>
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<td class="memname">void vPortSuppressTicksAndSleep </td>
<td>(</td>
<td class="paramtype"><a class="el" href="portmacro_8h.html#aa69c48c6e902ce54f70886e6573c92a9">TickType_t</a> </td>
<td class="paramname"><em>xExpectedIdleTime</em></td><td>)</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a6a9be2aa97aac4e7f03fe386f9281b9a">◆ </a></span>xPortIsInsideInterrupt()</h2>
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<td class="memname">static <a class="el" href="portmacro_8h.html#aaa356ca7932487d20a42d6839842d308">portFORCE_INLINE</a> <a class="el" href="portmacro_8h.html#a46fb21e00ae0729d7515c0fbf2269796">BaseType_t</a> xPortIsInsideInterrupt </td>
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<td class="paramname"></td><td>)</td>
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<div class="ttc" id="aportmacro_8h_html_a6e3fcd078a96185dea9b8ed5dd10db44"><div class="ttname"><a href="portmacro_8h.html#a6e3fcd078a96185dea9b8ed5dd10db44">portSY_FULL_READ_WRITE</a></div><div class="ttdeci">#define portSY_FULL_READ_WRITE</div><div class="ttdef"><b>Definition:</b> portmacro.h:79</div></div>
<div class="ttc" id="aportmacro_8h_html_a16830bf8349e14cdeed05193af234d5e"><div class="ttname"><a href="portmacro_8h.html#a16830bf8349e14cdeed05193af234d5e">portNVIC_PENDSVSET_BIT</a></div><div class="ttdeci">#define portNVIC_PENDSVSET_BIT</div><div class="ttdef"><b>Definition:</b> portmacro.h:96</div></div>
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