4204 lines
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4204 lines
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:adca26d8c1e2fb7971df487479fcdb6d6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#adca26d8c1e2fb7971df487479fcdb6d6">RTE_USB_USB0</a>   0</td></tr>
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<tr class="separator:adca26d8c1e2fb7971df487479fcdb6d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2ce455a1a6fc31d58af431f580113f29"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2ce455a1a6fc31d58af431f580113f29">RTE_USB_PPWR_ID</a>   1</td></tr>
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<tr class="separator:a2ce455a1a6fc31d58af431f580113f29"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a14bf0dfb4f672f29e4310c12fcc90634"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a14bf0dfb4f672f29e4310c12fcc90634">RTE_USB_PPWR_PIN_EN</a>   1</td></tr>
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<tr class="separator:a14bf0dfb4f672f29e4310c12fcc90634"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad6759ef48ef399b62dc258836d65c1d3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ad6759ef48ef399b62dc258836d65c1d3">RTE_USB_PWRD_ID</a>   1</td></tr>
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<tr class="separator:ad6759ef48ef399b62dc258836d65c1d3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac41587d557505ba3f0e6307f5b250fd8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ac41587d557505ba3f0e6307f5b250fd8">RTE_USB_PWRD_PIN_EN</a>   1</td></tr>
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<tr class="separator:ac41587d557505ba3f0e6307f5b250fd8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8a570623b992b5b54754c49de9c0036f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a8a570623b992b5b54754c49de9c0036f">RTE_USB_OVRCR_ID</a>   0</td></tr>
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<tr class="separator:a8a570623b992b5b54754c49de9c0036f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a47fd4660218e634ef00feeb8f282b235"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a47fd4660218e634ef00feeb8f282b235">RTE_USB_OVRCR_PIN_EN</a>   0</td></tr>
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<tr class="separator:a47fd4660218e634ef00feeb8f282b235"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aafcaf7e3c397dc593e4920397a2d5740"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aafcaf7e3c397dc593e4920397a2d5740">RTE_USB_CONNECT_ID</a>   1</td></tr>
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<tr class="separator:aafcaf7e3c397dc593e4920397a2d5740"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0380c57772518a86cd36ff8f344e0c3a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a0380c57772518a86cd36ff8f344e0c3a">RTE_USB_CONNECT_PIN_EN</a>   1</td></tr>
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<tr class="separator:a0380c57772518a86cd36ff8f344e0c3a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8d80d02f0312c3538f7ed7c5e78bce42"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a8d80d02f0312c3538f7ed7c5e78bce42">RTE_USB_VBUS_ID</a>   1</td></tr>
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<tr class="separator:a8d80d02f0312c3538f7ed7c5e78bce42"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab16cf7de0c182f651433b70723366dee"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ab16cf7de0c182f651433b70723366dee">RTE_USB_VBUS_PIN_EN</a>   1</td></tr>
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<tr class="separator:ab16cf7de0c182f651433b70723366dee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aaa4b793c5153d80024a672c51ead7efa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aaa4b793c5153d80024a672c51ead7efa">RTE_USB_UP_LED_ID</a>   1</td></tr>
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<tr class="separator:aaa4b793c5153d80024a672c51ead7efa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abb060213d7e1a42142752c3d98b99510"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#abb060213d7e1a42142752c3d98b99510">RTE_USB_UP_LED_PIN_EN</a>   1</td></tr>
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<tr class="separator:abb060213d7e1a42142752c3d98b99510"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5f84b60d40fb4c0dd627450ebc0d59c8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a5f84b60d40fb4c0dd627450ebc0d59c8">RTE_ENET</a>   0</td></tr>
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<tr class="separator:a5f84b60d40fb4c0dd627450ebc0d59c8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adecddcbc68dd85118497ac432e8ade20"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#adecddcbc68dd85118497ac432e8ade20">RTE_ENET_RMII</a>   1</td></tr>
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<tr class="separator:adecddcbc68dd85118497ac432e8ade20"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a349248062017fd013214338a58d947c7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a349248062017fd013214338a58d947c7">RTE_ENET_RMII_TXD0_PORT_ID</a>   0</td></tr>
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<tr class="separator:a349248062017fd013214338a58d947c7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a68c3636e0d972fa13b61d80bbc384a2f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a68c3636e0d972fa13b61d80bbc384a2f">RTE_ENET_RMII_TXD0_PORT</a>   1</td></tr>
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<tr class="separator:a68c3636e0d972fa13b61d80bbc384a2f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aae724f0b79a32ac0fe80d5ed749bda30"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aae724f0b79a32ac0fe80d5ed749bda30">RTE_ENET_RMII_TXD0_PIN</a>   0</td></tr>
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<tr class="separator:aae724f0b79a32ac0fe80d5ed749bda30"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab1959f2a6e6c8cc51652c3cb0c58511c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ab1959f2a6e6c8cc51652c3cb0c58511c">RTE_ENET_RMII_TXD0_FUNC</a>   1</td></tr>
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<tr class="separator:ab1959f2a6e6c8cc51652c3cb0c58511c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0c209b8277074d785c220f0fd76dc0ae"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a0c209b8277074d785c220f0fd76dc0ae">RTE_ENET_RMII_TXD1_PORT_ID</a>   0</td></tr>
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<tr class="separator:a0c209b8277074d785c220f0fd76dc0ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a034ef231e89bcabe448142e166a34376"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a034ef231e89bcabe448142e166a34376">RTE_ENET_RMII_TXD1_PORT</a>   1</td></tr>
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<tr class="separator:a034ef231e89bcabe448142e166a34376"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a75a3ef1bcb4d33f9a8985e4a3076b884"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a75a3ef1bcb4d33f9a8985e4a3076b884">RTE_ENET_RMII_TXD1_PIN</a>   1</td></tr>
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<tr class="separator:a75a3ef1bcb4d33f9a8985e4a3076b884"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afa06452aefaf0ebb821b4f5228b3b0ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#afa06452aefaf0ebb821b4f5228b3b0ed">RTE_ENET_RMII_TXD1_FUNC</a>   1</td></tr>
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<tr class="separator:afa06452aefaf0ebb821b4f5228b3b0ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af92feb99708a324edaf4a66e51ed7340"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#af92feb99708a324edaf4a66e51ed7340">RTE_ENET_RMII_REF_CLK_PORT_ID</a>   0</td></tr>
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<tr class="separator:af92feb99708a324edaf4a66e51ed7340"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a422e0ec99ed51e84e5980f1e25a7f57c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a422e0ec99ed51e84e5980f1e25a7f57c">RTE_ENET_RMII_REF_CLK_PORT</a>   1</td></tr>
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<tr class="separator:a422e0ec99ed51e84e5980f1e25a7f57c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a376f30753b2a3711be5069b1cdf34085"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a376f30753b2a3711be5069b1cdf34085">RTE_ENET_RMII_REF_CLK_PIN</a>   15</td></tr>
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<tr class="separator:a376f30753b2a3711be5069b1cdf34085"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab4b0e1e787b6bba7cf319dba2381f554"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ab4b0e1e787b6bba7cf319dba2381f554">RTE_ENET_RMII_REF_CLK_FUNC</a>   1</td></tr>
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<tr class="separator:ab4b0e1e787b6bba7cf319dba2381f554"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab1d637b7af67d3a673dd632e79c902fb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ab1d637b7af67d3a673dd632e79c902fb">RTE_ENET_RMII_TX_EN_PORT_ID</a>   0</td></tr>
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<tr class="memitem:a3bebc3bfedc3b3a427aae2bc4d0718dd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a3bebc3bfedc3b3a427aae2bc4d0718dd">RTE_ENET_RMII_TX_EN_PORT</a>   1</td></tr>
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<tr class="memitem:a7dceb1da711b8ad414e71da8b6957916"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a7dceb1da711b8ad414e71da8b6957916">RTE_ENET_RMII_TX_EN_PIN</a>   4</td></tr>
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<tr class="memitem:a4ca89a23d05e1e5f19ceccf80501cd6a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a4ca89a23d05e1e5f19ceccf80501cd6a">RTE_ENET_RMII_TX_EN_FUNC</a>   1</td></tr>
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<tr class="memitem:ae60219609242f18871244c8c90ffa626"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ae60219609242f18871244c8c90ffa626">RTE_ENET_RMII_CRS_PORT_ID</a>   0</td></tr>
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<tr class="memitem:ac6776c3b13de4dcdb3cace1c60b70844"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ac6776c3b13de4dcdb3cace1c60b70844">RTE_ENET_RMII_CRS_PORT</a>   1</td></tr>
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<tr class="memitem:ab1396a4622b463fe5a871a6180695f4c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ab1396a4622b463fe5a871a6180695f4c">RTE_ENET_RMII_CRS_PIN</a>   8</td></tr>
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<tr class="memitem:a8416da9f0955de9003fdf24dac82f739"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a8416da9f0955de9003fdf24dac82f739">RTE_ENET_RMII_CRS_FUNC</a>   1</td></tr>
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<tr class="memitem:ab12d48baed93c47bc1dda458ee61d0d0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ab12d48baed93c47bc1dda458ee61d0d0">RTE_ENET_RMII_RXD0_PORT_ID</a>   0</td></tr>
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<tr class="separator:ab12d48baed93c47bc1dda458ee61d0d0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4c049ecf05d503b9c8ec2bf14e073e21"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a4c049ecf05d503b9c8ec2bf14e073e21">RTE_ENET_RMII_RXD0_PORT</a>   1</td></tr>
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<tr class="separator:a4c049ecf05d503b9c8ec2bf14e073e21"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3d6e1695c8a10e6bc42b5854f55cce47"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a3d6e1695c8a10e6bc42b5854f55cce47">RTE_ENET_RMII_RXD0_PIN</a>   9</td></tr>
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<tr class="separator:a3d6e1695c8a10e6bc42b5854f55cce47"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa3eb0822bdd61035d91faae307f4721d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aa3eb0822bdd61035d91faae307f4721d">RTE_ENET_RMII_RXD0_FUNC</a>   1</td></tr>
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<tr class="separator:aa3eb0822bdd61035d91faae307f4721d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2f5d9565c875525e33f3093e6a6209a4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2f5d9565c875525e33f3093e6a6209a4">RTE_ENET_RMII_RXD1_PORT_ID</a>   0</td></tr>
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<tr class="separator:a2f5d9565c875525e33f3093e6a6209a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a69f433c0e9ace2d288fd2ab17466060c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a69f433c0e9ace2d288fd2ab17466060c">RTE_ENET_RMII_RXD1_PORT</a>   1</td></tr>
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<tr class="separator:a69f433c0e9ace2d288fd2ab17466060c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aacfda78c8391125c539c610fb66cad5f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aacfda78c8391125c539c610fb66cad5f">RTE_ENET_RMII_RXD1_PIN</a>   10</td></tr>
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<tr class="separator:aacfda78c8391125c539c610fb66cad5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aacaeefc080acb6d9bb024ed57a9db4a0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aacaeefc080acb6d9bb024ed57a9db4a0">RTE_ENET_RMII_RXD1_FUNC</a>   1</td></tr>
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<tr class="separator:aacaeefc080acb6d9bb024ed57a9db4a0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a43b423ed6026e77223995edb0e475864"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a43b423ed6026e77223995edb0e475864">RTE_ENET_RMII_RX_ER_PORT_ID</a>   0</td></tr>
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<tr class="separator:a43b423ed6026e77223995edb0e475864"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a286ef8ddb9fef8fda60a257698778376"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a286ef8ddb9fef8fda60a257698778376">RTE_ENET_RMII_RX_ER_PORT</a>   1</td></tr>
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<tr class="separator:a286ef8ddb9fef8fda60a257698778376"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a959db22b2b37e5446e26fda98de4ab91"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a959db22b2b37e5446e26fda98de4ab91">RTE_ENET_RMII_RX_ER_PIN</a>   14</td></tr>
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<tr class="separator:a959db22b2b37e5446e26fda98de4ab91"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7d685a108f02314978eddcbcf4fb8dca"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a7d685a108f02314978eddcbcf4fb8dca">RTE_ENET_RMII_RX_ER_FUNC</a>   1</td></tr>
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<tr class="separator:a7d685a108f02314978eddcbcf4fb8dca"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a838aceb9f407e126d19314b4a9fb2fac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a838aceb9f407e126d19314b4a9fb2fac">RTE_ENET_MDI_MDC_PORT_ID</a>   0</td></tr>
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<tr class="separator:a838aceb9f407e126d19314b4a9fb2fac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a590db99351a115b061256aea62f35ccf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a590db99351a115b061256aea62f35ccf">RTE_ENET_MDI_MDC_PORT</a>   1</td></tr>
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<tr class="separator:a590db99351a115b061256aea62f35ccf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a046ff7f77d9f5d7416faa4541b36ccfd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a046ff7f77d9f5d7416faa4541b36ccfd">RTE_ENET_MDI_MDC_PIN</a>   16</td></tr>
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<tr class="separator:a046ff7f77d9f5d7416faa4541b36ccfd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7119d0bce44bfd5d344fa04b812717d9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a7119d0bce44bfd5d344fa04b812717d9">RTE_ENET_MDI_MDC_FUNC</a>   1</td></tr>
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<tr class="separator:a7119d0bce44bfd5d344fa04b812717d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a96d15918268614854f433a7651d403a4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a96d15918268614854f433a7651d403a4">RTE_ENET_MDI_MDIO_PORT_ID</a>   0</td></tr>
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<tr class="separator:a96d15918268614854f433a7651d403a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a27a385aa0cb2711b7ba39b55b516cc36"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a27a385aa0cb2711b7ba39b55b516cc36">RTE_ENET_MDI_MDIO_PORT</a>   1</td></tr>
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<tr class="separator:a27a385aa0cb2711b7ba39b55b516cc36"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1a390ae28955a3f382121202a0cbc35a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a1a390ae28955a3f382121202a0cbc35a">RTE_ENET_MDI_MDIO_PIN</a>   17</td></tr>
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<tr class="separator:a1a390ae28955a3f382121202a0cbc35a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a307ba2cfa165a3d54505b1795f1bb72b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a307ba2cfa165a3d54505b1795f1bb72b">RTE_ENET_MDI_MDIO_FUNC</a>   1</td></tr>
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<tr class="separator:a307ba2cfa165a3d54505b1795f1bb72b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afdae116c2c595573ddee8725b6a4602a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#afdae116c2c595573ddee8725b6a4602a">RTE_I2C0</a>   0</td></tr>
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<tr class="separator:afdae116c2c595573ddee8725b6a4602a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aff858373bf316e029fe765d8d6801792"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aff858373bf316e029fe765d8d6801792">RTE_I2C0_SCL_PORT_ID</a>   0</td></tr>
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<tr class="separator:aff858373bf316e029fe765d8d6801792"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2ea1e6bddee42e3341664acfc7f7f3ba"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2ea1e6bddee42e3341664acfc7f7f3ba">RTE_I2C0_SCL_PORT</a>   0</td></tr>
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<tr class="separator:a2ea1e6bddee42e3341664acfc7f7f3ba"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2edc42e46a1c49b9c227d5b9b908cb71"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2edc42e46a1c49b9c227d5b9b908cb71">RTE_I2C0_SCL_PIN</a>   28</td></tr>
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<tr class="separator:a2edc42e46a1c49b9c227d5b9b908cb71"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a16b57c9e56e6bc66cc301d9c9a5767ec"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a16b57c9e56e6bc66cc301d9c9a5767ec">RTE_I2C0_SCL_FUNC</a>   1</td></tr>
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<tr class="separator:a16b57c9e56e6bc66cc301d9c9a5767ec"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a551ce5cdc353ceffe01cd785cc381157"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a551ce5cdc353ceffe01cd785cc381157">RTE_I2C0_SDA_PORT_ID</a>   0</td></tr>
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<tr class="separator:a551ce5cdc353ceffe01cd785cc381157"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6728318d028d1fdd84eec2399fbfca17"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a6728318d028d1fdd84eec2399fbfca17">RTE_I2C0_SDA_PORT</a>   0</td></tr>
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<tr class="separator:a6728318d028d1fdd84eec2399fbfca17"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acbff94c65d03a4b842e6dc17ea979cff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#acbff94c65d03a4b842e6dc17ea979cff">RTE_I2C0_SDA_PIN</a>   27</td></tr>
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<tr class="separator:acbff94c65d03a4b842e6dc17ea979cff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aed5f4774dea040f15609f57ec198c8f2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aed5f4774dea040f15609f57ec198c8f2">RTE_I2C0_SDA_FUNC</a>   1</td></tr>
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<tr class="separator:aed5f4774dea040f15609f57ec198c8f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa4264010a207548708e4eb5030b77b42"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aa4264010a207548708e4eb5030b77b42">RTE_I2C1</a>   0</td></tr>
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<tr class="separator:aa4264010a207548708e4eb5030b77b42"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2422c10368e946f81371faa508fda920"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2422c10368e946f81371faa508fda920">RTE_I2C1_SCL_PORT_ID</a>   0</td></tr>
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<tr class="separator:a2422c10368e946f81371faa508fda920"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a043e7dfd69c669ff538b0140f61450dd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a043e7dfd69c669ff538b0140f61450dd">RTE_I2C1_SCL_PORT</a>   0</td></tr>
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<tr class="separator:a043e7dfd69c669ff538b0140f61450dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a20585e3256c3bf992e706d6301da9f5f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a20585e3256c3bf992e706d6301da9f5f">RTE_I2C1_SCL_PIN</a>   1</td></tr>
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<tr class="separator:a20585e3256c3bf992e706d6301da9f5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa19b4c9a165be8d6785471dd641ba82e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aa19b4c9a165be8d6785471dd641ba82e">RTE_I2C1_SCL_FUNC</a>   3</td></tr>
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<tr class="separator:aa19b4c9a165be8d6785471dd641ba82e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aedee90b93ad5a9547e648ff4492badad"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aedee90b93ad5a9547e648ff4492badad">RTE_I2C1_SDA_PORT_ID</a>   0</td></tr>
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<tr class="separator:aedee90b93ad5a9547e648ff4492badad"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a69b761f8a46ccd974ba87ea641d48987"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a69b761f8a46ccd974ba87ea641d48987">RTE_I2C1_SDA_PORT</a>   0</td></tr>
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<tr class="separator:a69b761f8a46ccd974ba87ea641d48987"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a72617dd6c167f7165abc2bb18372a11b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a72617dd6c167f7165abc2bb18372a11b">RTE_I2C1_SDA_PIN</a>   0</td></tr>
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<tr class="separator:a72617dd6c167f7165abc2bb18372a11b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae8f9af8de00cbe11f124416158b10480"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ae8f9af8de00cbe11f124416158b10480">RTE_I2C1_SDA_FUNC</a>   3</td></tr>
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<tr class="separator:ae8f9af8de00cbe11f124416158b10480"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6b312911602934f2275e5bfdd964a3c2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a6b312911602934f2275e5bfdd964a3c2">RTE_I2C2</a>   1</td></tr>
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<tr class="separator:a6b312911602934f2275e5bfdd964a3c2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a04f0f3965a79dc8aebc2c5c0cc5fe7cf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a04f0f3965a79dc8aebc2c5c0cc5fe7cf">RTE_I2C2_SCL_PORT_ID</a>   0</td></tr>
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<tr class="separator:a04f0f3965a79dc8aebc2c5c0cc5fe7cf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8994f5bb7cdd25119c912245d6e2abd0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a8994f5bb7cdd25119c912245d6e2abd0">RTE_I2C2_SCL_PORT</a>   0</td></tr>
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<tr class="separator:a8994f5bb7cdd25119c912245d6e2abd0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab9a83c24e199daf104c72f5a94580bf0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ab9a83c24e199daf104c72f5a94580bf0">RTE_I2C2_SCL_PIN</a>   11</td></tr>
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<tr class="separator:ab9a83c24e199daf104c72f5a94580bf0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a12577c3bb59550ce3d32b0cd8a1f3698"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a12577c3bb59550ce3d32b0cd8a1f3698">RTE_I2C2_SCL_FUNC</a>   2</td></tr>
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<tr class="separator:a12577c3bb59550ce3d32b0cd8a1f3698"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a971ec319ac1dca25f61b8d6fe0e9b9d2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a971ec319ac1dca25f61b8d6fe0e9b9d2">RTE_I2C2_SDA_PORT_ID</a>   0</td></tr>
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<tr class="separator:a971ec319ac1dca25f61b8d6fe0e9b9d2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2494b618e7af4097c7b6d0962d481786"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2494b618e7af4097c7b6d0962d481786">RTE_I2C2_SDA_PORT</a>   0</td></tr>
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<tr class="separator:a2494b618e7af4097c7b6d0962d481786"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a91d41fb93262cdf7c5df0549f7e67383"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a91d41fb93262cdf7c5df0549f7e67383">RTE_I2C2_SDA_PIN</a>   10</td></tr>
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<tr class="separator:a91d41fb93262cdf7c5df0549f7e67383"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aba227fc9424875cc01b31be871d7423c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aba227fc9424875cc01b31be871d7423c">RTE_I2C2_SDA_FUNC</a>   2</td></tr>
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<tr class="separator:aba227fc9424875cc01b31be871d7423c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8639dd9ee646b6cefcd45f7597da18d1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a8639dd9ee646b6cefcd45f7597da18d1">RTE_UART0</a>   0</td></tr>
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<tr class="separator:a8639dd9ee646b6cefcd45f7597da18d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5996866b91a203ec4cf10ff1f10a128a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a5996866b91a203ec4cf10ff1f10a128a">RTE_UART0_TX_ID</a>   0</td></tr>
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<tr class="separator:a5996866b91a203ec4cf10ff1f10a128a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a12d85483cafb6e96c9604c21599af53d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a12d85483cafb6e96c9604c21599af53d">RTE_UART0_TX_PIN_EN</a>   0</td></tr>
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<tr class="separator:a12d85483cafb6e96c9604c21599af53d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af367f08c81fb13d7cab7841a4032f367"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#af367f08c81fb13d7cab7841a4032f367">RTE_UART0_RX_ID</a>   0</td></tr>
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<tr class="separator:af367f08c81fb13d7cab7841a4032f367"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aad8c5eaf6024b3e65699b28f0899e330"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aad8c5eaf6024b3e65699b28f0899e330">RTE_UART0_RX_PIN_EN</a>   0</td></tr>
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<tr class="separator:aad8c5eaf6024b3e65699b28f0899e330"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1addccf315e07c48226077eef30afc84"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a1addccf315e07c48226077eef30afc84">RTE_UART0_DMA_TX_EN</a>   1</td></tr>
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<tr class="separator:a1addccf315e07c48226077eef30afc84"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2773642f6f269580e576af5f4e0155cb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2773642f6f269580e576af5f4e0155cb">RTE_UART0_DMA_TX_CH</a>   0</td></tr>
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<tr class="separator:a2773642f6f269580e576af5f4e0155cb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0beb8239ec9323a103c2b921a82363f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a0beb8239ec9323a103c2b921a82363f5">RTE_UART0_DMA_RX_EN</a>   1</td></tr>
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<tr class="separator:a0beb8239ec9323a103c2b921a82363f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a77d34bc38199a005c82c8ed02ca204f1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a77d34bc38199a005c82c8ed02ca204f1">RTE_UART0_DMA_RX_CH</a>   1</td></tr>
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<tr class="separator:a77d34bc38199a005c82c8ed02ca204f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a679626ce9217aa64938039aa66c56c05"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a679626ce9217aa64938039aa66c56c05">RTE_UART1</a>   0</td></tr>
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<tr class="separator:a679626ce9217aa64938039aa66c56c05"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5ba3412d06d640a19e683aa991c27bc2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a5ba3412d06d640a19e683aa991c27bc2">RTE_UART1_TX_ID</a>   1</td></tr>
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<tr class="separator:a5ba3412d06d640a19e683aa991c27bc2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1b19c327066d352db55f63fdc8d7f4bf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a1b19c327066d352db55f63fdc8d7f4bf">RTE_UART1_TX_PORT</a>   0</td></tr>
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<tr class="separator:a1b19c327066d352db55f63fdc8d7f4bf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa1e45f413d8d98571cef5fc581493f01"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aa1e45f413d8d98571cef5fc581493f01">RTE_UART1_TX_BIT</a>   15</td></tr>
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<tr class="separator:aa1e45f413d8d98571cef5fc581493f01"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3a8c751b16638dff43c3f213c2b8ec6a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a3a8c751b16638dff43c3f213c2b8ec6a">RTE_UART1_TX_FUNC</a>   1</td></tr>
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<tr class="separator:a3a8c751b16638dff43c3f213c2b8ec6a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afc43e8fe8742f9619d2ddcb25d562c82"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#afc43e8fe8742f9619d2ddcb25d562c82">RTE_UART1_TX_PIN_EN</a>   1</td></tr>
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<tr class="separator:afc43e8fe8742f9619d2ddcb25d562c82"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a319aaeb49e135c277d815f7b3cbfc6b6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a319aaeb49e135c277d815f7b3cbfc6b6">RTE_UART1_RX_ID</a>   1</td></tr>
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<tr class="separator:a319aaeb49e135c277d815f7b3cbfc6b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6c8e95ccf09c84d0cb525828f9faf6e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a6c8e95ccf09c84d0cb525828f9faf6e1">RTE_UART1_RX_PORT</a>   0</td></tr>
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<tr class="separator:a6c8e95ccf09c84d0cb525828f9faf6e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a09191f0241f496799a26d47c23f2e0bb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a09191f0241f496799a26d47c23f2e0bb">RTE_UART1_RX_BIT</a>   16</td></tr>
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<tr class="separator:a09191f0241f496799a26d47c23f2e0bb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a01049ed366ef8560c7660c8d55e41b59"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a01049ed366ef8560c7660c8d55e41b59">RTE_UART1_RX_FUNC</a>   1</td></tr>
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<tr class="separator:a01049ed366ef8560c7660c8d55e41b59"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a680787a2d026003a648a2700cb810f64"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a680787a2d026003a648a2700cb810f64">RTE_UART1_RX_PIN_EN</a>   1</td></tr>
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<tr class="separator:a680787a2d026003a648a2700cb810f64"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9e3bdba84713d523b3d00dd0eb8628fd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a9e3bdba84713d523b3d00dd0eb8628fd">RTE_UART1_CTS_ID</a>   0</td></tr>
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<tr class="separator:a9e3bdba84713d523b3d00dd0eb8628fd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9c881e4f68592f378b2d096db76dfbcb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a9c881e4f68592f378b2d096db76dfbcb">RTE_UART1_CTS_PIN_EN</a>   0</td></tr>
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<tr class="separator:a9c881e4f68592f378b2d096db76dfbcb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae26dc5ba7e59a413425460044cea5b9f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ae26dc5ba7e59a413425460044cea5b9f">RTE_UART1_DCD_ID</a>   0</td></tr>
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<tr class="separator:ae26dc5ba7e59a413425460044cea5b9f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2ecaf88ec78c71eda10eb1ed1c60d84f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2ecaf88ec78c71eda10eb1ed1c60d84f">RTE_UART1_DCD_PIN_EN</a>   0</td></tr>
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<tr class="separator:a2ecaf88ec78c71eda10eb1ed1c60d84f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af514c4c05a427153f63e1e303063d52c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#af514c4c05a427153f63e1e303063d52c">RTE_UART1_DSR_ID</a>   0</td></tr>
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<tr class="separator:af514c4c05a427153f63e1e303063d52c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a96d567704c0092be10648020494844da"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a96d567704c0092be10648020494844da">RTE_UART1_DSR_PIN_EN</a>   0</td></tr>
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<tr class="separator:a96d567704c0092be10648020494844da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a796fcfbefa88367642e657562866701a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a796fcfbefa88367642e657562866701a">RTE_UART1_DTR_ID</a>   0</td></tr>
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<tr class="separator:a796fcfbefa88367642e657562866701a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2f756be798b56297accd8c39b9a7abf2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2f756be798b56297accd8c39b9a7abf2">RTE_UART1_DTR_PIN_EN</a>   0</td></tr>
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<tr class="separator:a2f756be798b56297accd8c39b9a7abf2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a420bc5736f477da5ca3c917ec74b56fa"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a420bc5736f477da5ca3c917ec74b56fa">RTE_UART1_RI_ID</a>   0</td></tr>
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<tr class="separator:a420bc5736f477da5ca3c917ec74b56fa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad08f0a8dc63831553be03b0385aea414"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ad08f0a8dc63831553be03b0385aea414">RTE_UART1_RI_PIN_EN</a>   0</td></tr>
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<tr class="separator:ad08f0a8dc63831553be03b0385aea414"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a83f0308b301aa55076b9eb0cbb596f4d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a83f0308b301aa55076b9eb0cbb596f4d">RTE_UART1_RTS_ID</a>   0</td></tr>
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<tr class="separator:a83f0308b301aa55076b9eb0cbb596f4d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a08e48879a79efb994ba6cf2a091c174a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a08e48879a79efb994ba6cf2a091c174a">RTE_UART1_RTS_PIN_EN</a>   0</td></tr>
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<tr class="separator:a08e48879a79efb994ba6cf2a091c174a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6f6427ccf5dda78bbcae99138a9b6c4e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a6f6427ccf5dda78bbcae99138a9b6c4e">RTE_UART1_DMA_TX_EN</a>   1</td></tr>
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<tr class="separator:a6f6427ccf5dda78bbcae99138a9b6c4e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab35f2580ec735e254f33555d47d17381"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ab35f2580ec735e254f33555d47d17381">RTE_UART1_DMA_TX_CH</a>   0</td></tr>
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<tr class="separator:ab35f2580ec735e254f33555d47d17381"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2d00b073e75ffca3d6244fb33219b613"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2d00b073e75ffca3d6244fb33219b613">RTE_UART1_DMA_RX_EN</a>   1</td></tr>
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<tr class="separator:a2d00b073e75ffca3d6244fb33219b613"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a423c193d166e75cdd722176ac4d5abfb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a423c193d166e75cdd722176ac4d5abfb">RTE_UART1_DMA_RX_CH</a>   1</td></tr>
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<tr class="separator:a423c193d166e75cdd722176ac4d5abfb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5a852e968f447682fc3e2a8a1340bf34"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a5a852e968f447682fc3e2a8a1340bf34">RTE_UART2</a>   0</td></tr>
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<tr class="separator:a5a852e968f447682fc3e2a8a1340bf34"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af987b6471cc7c5e7a6d37f37d1c5d781"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#af987b6471cc7c5e7a6d37f37d1c5d781">RTE_UART2_TX_ID</a>   0</td></tr>
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<tr class="separator:af987b6471cc7c5e7a6d37f37d1c5d781"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a47be884beac4ce9326401489abd83455"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a47be884beac4ce9326401489abd83455">RTE_UART2_TX_PIN_EN</a>   0</td></tr>
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<tr class="separator:a47be884beac4ce9326401489abd83455"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:accbe8dbd2baa58d05dd86be119bf7cbb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#accbe8dbd2baa58d05dd86be119bf7cbb">RTE_UART2_RX_ID</a>   0</td></tr>
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<tr class="separator:accbe8dbd2baa58d05dd86be119bf7cbb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af3552f613ff864318c8df85ff2b1a3f8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#af3552f613ff864318c8df85ff2b1a3f8">RTE_UART2_RX_PIN_EN</a>   0</td></tr>
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<tr class="separator:af3552f613ff864318c8df85ff2b1a3f8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae1380d82222d77665bbcca5bcdede906"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ae1380d82222d77665bbcca5bcdede906">RTE_UART2_DMA_TX_EN</a>   1</td></tr>
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<tr class="separator:ae1380d82222d77665bbcca5bcdede906"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a803e0da232a48295368bb05718e2bcf3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a803e0da232a48295368bb05718e2bcf3">RTE_UART2_DMA_TX_CH</a>   0</td></tr>
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<tr class="separator:a803e0da232a48295368bb05718e2bcf3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af925ce15f564b994f467e7d2e7a112c6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#af925ce15f564b994f467e7d2e7a112c6">RTE_UART2_DMA_RX_EN</a>   1</td></tr>
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<tr class="separator:af925ce15f564b994f467e7d2e7a112c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac7d0fe249612f405673530aab9ff86c3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ac7d0fe249612f405673530aab9ff86c3">RTE_UART2_DMA_RX_CH</a>   1</td></tr>
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<tr class="separator:ac7d0fe249612f405673530aab9ff86c3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a75510c1535eaf90294dce09aea4c8b6f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a75510c1535eaf90294dce09aea4c8b6f">RTE_UART3</a>   0</td></tr>
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<tr class="separator:a75510c1535eaf90294dce09aea4c8b6f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9ae1a01dd80710da23bc959dd66459ce"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a9ae1a01dd80710da23bc959dd66459ce">RTE_UART3_TX_ID</a>   0</td></tr>
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<tr class="separator:a9ae1a01dd80710da23bc959dd66459ce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa4ea2b0834ca7d14bfb1c07d567e201b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aa4ea2b0834ca7d14bfb1c07d567e201b">RTE_UART3_TX_PIN_EN</a>   0</td></tr>
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<tr class="separator:aa4ea2b0834ca7d14bfb1c07d567e201b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac07b38e4f7217241d307d338575eb1f2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ac07b38e4f7217241d307d338575eb1f2">RTE_UART3_RX_ID</a>   0</td></tr>
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<tr class="separator:ac07b38e4f7217241d307d338575eb1f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0010d8e1bb1cf97234c642b7ce33c995"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a0010d8e1bb1cf97234c642b7ce33c995">RTE_UART3_RX_PIN_EN</a>   0</td></tr>
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<tr class="separator:a0010d8e1bb1cf97234c642b7ce33c995"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2eb6663e4a8212c12a3841ac5d37fffe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2eb6663e4a8212c12a3841ac5d37fffe">RTE_UART3_DMA_TX_EN</a>   1</td></tr>
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<tr class="separator:a2eb6663e4a8212c12a3841ac5d37fffe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2eff9fea2ed80947532f14ee67f87b3f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2eff9fea2ed80947532f14ee67f87b3f">RTE_UART3_DMA_TX_CH</a>   0</td></tr>
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<tr class="separator:a2eff9fea2ed80947532f14ee67f87b3f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9479884692d4c76f3f6a4d1389af110f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a9479884692d4c76f3f6a4d1389af110f">RTE_UART3_DMA_RX_EN</a>   1</td></tr>
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<tr class="separator:a9479884692d4c76f3f6a4d1389af110f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad3e41d6188407499f751b4340ddf52bf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ad3e41d6188407499f751b4340ddf52bf">RTE_UART3_DMA_RX_CH</a>   1</td></tr>
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<tr class="separator:ad3e41d6188407499f751b4340ddf52bf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a326d4ecd87c8ca6cfdb72db4b1983ae0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a326d4ecd87c8ca6cfdb72db4b1983ae0">RTE_CAN_CAN1</a>   0</td></tr>
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<tr class="separator:a326d4ecd87c8ca6cfdb72db4b1983ae0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad00eaa388906f82f72936b15afa603ed"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ad00eaa388906f82f72936b15afa603ed">RTE_CAN1_RD_ID</a>   0</td></tr>
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<tr class="separator:ad00eaa388906f82f72936b15afa603ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a50d710b56297d35cdde96ecbe3a81024"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a50d710b56297d35cdde96ecbe3a81024">RTE_CAN1_RD_PIN_EN</a>   0</td></tr>
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<tr class="separator:a50d710b56297d35cdde96ecbe3a81024"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acbe26bdcc74039a53d667c5100b36614"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#acbe26bdcc74039a53d667c5100b36614">RTE_CAN1_TD_ID</a>   0</td></tr>
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<tr class="separator:acbe26bdcc74039a53d667c5100b36614"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8c7b370096ec9709c41c9e2346553354"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a8c7b370096ec9709c41c9e2346553354">RTE_CAN1_TD_PIN_EN</a>   0</td></tr>
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<tr class="separator:a8c7b370096ec9709c41c9e2346553354"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5fcb76fe6d18a009f90a21cd1b87efdb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a5fcb76fe6d18a009f90a21cd1b87efdb">RTE_CAN_CAN2</a>   1</td></tr>
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<tr class="separator:a5fcb76fe6d18a009f90a21cd1b87efdb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5bb2e03d5baa28680bf3c7379a6f52dc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a5bb2e03d5baa28680bf3c7379a6f52dc">RTE_CAN2_RD_ID</a>   0</td></tr>
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<tr class="separator:a5bb2e03d5baa28680bf3c7379a6f52dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a64f8ca15ab3017246e85f4fea2ac22e3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a64f8ca15ab3017246e85f4fea2ac22e3">RTE_CAN2_RD_PIN_EN</a>   0</td></tr>
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<tr class="separator:a64f8ca15ab3017246e85f4fea2ac22e3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a02d518e7e540c61d27e95758db802b15"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a02d518e7e540c61d27e95758db802b15">RTE_CAN2_TD_ID</a>   0</td></tr>
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<tr class="separator:a02d518e7e540c61d27e95758db802b15"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aaebdb69c860f36d799d2f5888360e8f4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aaebdb69c860f36d799d2f5888360e8f4">RTE_CAN2_TD_PIN_EN</a>   0</td></tr>
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<tr class="separator:aaebdb69c860f36d799d2f5888360e8f4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a98f8c818193c955748112623a367af2f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a98f8c818193c955748112623a367af2f">RTE_SSP0</a>   1</td></tr>
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<tr class="separator:a98f8c818193c955748112623a367af2f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a181dad6deaf19754094caf13a587ed89"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a181dad6deaf19754094caf13a587ed89">RTE_SSP0_SSEL_PIN_SEL</a>   1</td></tr>
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<tr class="separator:a181dad6deaf19754094caf13a587ed89"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4645634741fc25ade272ebf0086ea2c7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a4645634741fc25ade272ebf0086ea2c7">RTE_SSP0_SSEL_PORT</a>   0</td></tr>
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<tr class="separator:a4645634741fc25ade272ebf0086ea2c7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acce1f8da9f1d4bb98730f4a63d4693e6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#acce1f8da9f1d4bb98730f4a63d4693e6">RTE_SSP0_SSEL_BIT</a>   16</td></tr>
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<tr class="separator:acce1f8da9f1d4bb98730f4a63d4693e6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab8bc0d51050e105577d3b37092653857"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ab8bc0d51050e105577d3b37092653857">RTE_SSP0_SSEL_FUNC</a>   2</td></tr>
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<tr class="separator:ab8bc0d51050e105577d3b37092653857"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adb637f5152d8597f031dfe5f82022753"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#adb637f5152d8597f031dfe5f82022753">RTE_SSP0_SSEL_PIN_EN</a>   1</td></tr>
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<tr class="separator:adb637f5152d8597f031dfe5f82022753"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a60c5bfd3dddc134d29bcbe2b043ce0b4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a60c5bfd3dddc134d29bcbe2b043ce0b4">RTE_SSP0_SCK_PIN_SEL</a>   0</td></tr>
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<tr class="separator:a60c5bfd3dddc134d29bcbe2b043ce0b4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa8119695f7ba82ad9fda44b7012e3995"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aa8119695f7ba82ad9fda44b7012e3995">RTE_SSP0_SCK_PORT</a>   0</td></tr>
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<tr class="separator:aa8119695f7ba82ad9fda44b7012e3995"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5ac21a7368393d4ba2897471575daf3a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a5ac21a7368393d4ba2897471575daf3a">RTE_SSP0_SCK_BIT</a>   15</td></tr>
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<tr class="separator:a5ac21a7368393d4ba2897471575daf3a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aad3ff66db457277ce3ad0cf9356464d6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aad3ff66db457277ce3ad0cf9356464d6">RTE_SSP0_SCK_FUNC</a>   2</td></tr>
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<tr class="separator:aad3ff66db457277ce3ad0cf9356464d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab9fcb134aba8b5ac6ef51c03516d6772"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ab9fcb134aba8b5ac6ef51c03516d6772">RTE_SSP0_MISO_PIN_SEL</a>   1</td></tr>
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<tr class="separator:ab9fcb134aba8b5ac6ef51c03516d6772"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac99a73535cbeb3ac0ff5993539919775"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ac99a73535cbeb3ac0ff5993539919775">RTE_SSP0_MISO_PORT</a>   0</td></tr>
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<tr class="separator:ac99a73535cbeb3ac0ff5993539919775"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4bd3a1e08f115de8f252fc6262c31397"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a4bd3a1e08f115de8f252fc6262c31397">RTE_SSP0_MISO_BIT</a>   17</td></tr>
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<tr class="separator:a4bd3a1e08f115de8f252fc6262c31397"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a97688d4ea37c8385032de0e74230735e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a97688d4ea37c8385032de0e74230735e">RTE_SSP0_MISO_FUNC</a>   2</td></tr>
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<tr class="separator:a97688d4ea37c8385032de0e74230735e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7c5b97f6efa12d4802897b18e74bb32b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a7c5b97f6efa12d4802897b18e74bb32b">RTE_SSP0_MISO_PIN_EN</a>   1</td></tr>
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<tr class="separator:a7c5b97f6efa12d4802897b18e74bb32b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3cdd5d454557c6b7dedab79b0f9ed200"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a3cdd5d454557c6b7dedab79b0f9ed200">RTE_SSP0_MOSI_PIN_SEL</a>   1</td></tr>
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<tr class="separator:a3cdd5d454557c6b7dedab79b0f9ed200"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8b01cbb2428f39864df480b6ea09c680"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a8b01cbb2428f39864df480b6ea09c680">RTE_SSP0_MOSI_PORT</a>   0</td></tr>
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<tr class="separator:a8b01cbb2428f39864df480b6ea09c680"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af70a3119627cd96b152582c4551d9c03"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#af70a3119627cd96b152582c4551d9c03">RTE_SSP0_MOSI_BIT</a>   18</td></tr>
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<tr class="separator:af70a3119627cd96b152582c4551d9c03"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a414963c0a75c796935205ad03aa7cb36"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a414963c0a75c796935205ad03aa7cb36">RTE_SSP0_MOSI_FUNC</a>   2</td></tr>
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<tr class="separator:a414963c0a75c796935205ad03aa7cb36"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae8f4d5b905758a77e8e53c3a6568bb07"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ae8f4d5b905758a77e8e53c3a6568bb07">RTE_SSP0_MOSI_PIN_EN</a>   1</td></tr>
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<tr class="separator:ae8f4d5b905758a77e8e53c3a6568bb07"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a78ea0b13a99d1c9b2dec00b6c52fa8f2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a78ea0b13a99d1c9b2dec00b6c52fa8f2">RTE_SSP0_DMA_TX_EN</a>   0</td></tr>
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<tr class="separator:a78ea0b13a99d1c9b2dec00b6c52fa8f2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:addf240dd8e4cd3e336cd595834fbff58"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#addf240dd8e4cd3e336cd595834fbff58">RTE_SSP0_DMA_TX_CH</a>   0</td></tr>
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<tr class="memitem:adb01a4654df85c32e4b46c007ece0b45"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#adb01a4654df85c32e4b46c007ece0b45">RTE_SSP0_DMA_RX_EN</a>   0</td></tr>
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<tr class="separator:adb01a4654df85c32e4b46c007ece0b45"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae2f15c004b56fb9b434ec60ceff4e478"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ae2f15c004b56fb9b434ec60ceff4e478">RTE_SSP0_DMA_RX_CH</a>   1</td></tr>
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<tr class="separator:ae2f15c004b56fb9b434ec60ceff4e478"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2a0c96b5957baead0d14f04f61005614"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2a0c96b5957baead0d14f04f61005614">RTE_SSP1</a>   1</td></tr>
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<tr class="separator:a2a0c96b5957baead0d14f04f61005614"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a83c2b398a041dac0006a474f4f3ba944"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a83c2b398a041dac0006a474f4f3ba944">RTE_SSP1_SSEL_PIN_SEL</a>   1</td></tr>
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<tr class="separator:a83c2b398a041dac0006a474f4f3ba944"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a474f20638a962ed9da32123c46f22009"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a474f20638a962ed9da32123c46f22009">RTE_SSP1_SSEL_PORT</a>   0</td></tr>
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<tr class="separator:a474f20638a962ed9da32123c46f22009"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5c7b741b263e11d1db4095fd0ab9174c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a5c7b741b263e11d1db4095fd0ab9174c">RTE_SSP1_SSEL_BIT</a>   6</td></tr>
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<tr class="separator:a5c7b741b263e11d1db4095fd0ab9174c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a79df869a05c916475f483588356f3391"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a79df869a05c916475f483588356f3391">RTE_SSP1_SSEL_FUNC</a>   2</td></tr>
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<tr class="separator:a79df869a05c916475f483588356f3391"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a36773ffd863e5892e92d35402070ba44"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a36773ffd863e5892e92d35402070ba44">RTE_SSP1_SSEL_PIN_EN</a>   1</td></tr>
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<tr class="separator:a36773ffd863e5892e92d35402070ba44"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a26602f64477d33e39b8fd49fbf935c6d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a26602f64477d33e39b8fd49fbf935c6d">RTE_SSP1_SCK_PIN_SEL</a>   0</td></tr>
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<tr class="separator:a26602f64477d33e39b8fd49fbf935c6d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2196958f2dbf778221c1214c86c21376"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2196958f2dbf778221c1214c86c21376">RTE_SSP1_SCK_PORT</a>   0</td></tr>
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<tr class="separator:a2196958f2dbf778221c1214c86c21376"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1941f0c23f86411d5008f516b5881cdc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a1941f0c23f86411d5008f516b5881cdc">RTE_SSP1_SCK_BIT</a>   7</td></tr>
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<tr class="separator:a1941f0c23f86411d5008f516b5881cdc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac73fe8ab90c4e279922001c383ab3c51"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ac73fe8ab90c4e279922001c383ab3c51">RTE_SSP1_SCK_FUNC</a>   2</td></tr>
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<tr class="separator:ac73fe8ab90c4e279922001c383ab3c51"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abdc026a3f82851fe25479290a527d767"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#abdc026a3f82851fe25479290a527d767">RTE_SSP1_MISO_PIN_SEL</a>   1</td></tr>
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<tr class="separator:abdc026a3f82851fe25479290a527d767"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a390a64d3cfbe165aeec0ecdc2becf0e9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a390a64d3cfbe165aeec0ecdc2becf0e9">RTE_SSP1_MISO_PORT</a>   0</td></tr>
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<tr class="separator:a390a64d3cfbe165aeec0ecdc2becf0e9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a89c0d735b894ed527d2e446a9a2f7d18"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a89c0d735b894ed527d2e446a9a2f7d18">RTE_SSP1_MISO_BIT</a>   8</td></tr>
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<tr class="separator:a89c0d735b894ed527d2e446a9a2f7d18"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0fb88c12651957635fb173460d699619"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a0fb88c12651957635fb173460d699619">RTE_SSP1_MISO_FUNC</a>   2</td></tr>
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<tr class="separator:a0fb88c12651957635fb173460d699619"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afe72cc468f0b05f5e2ea508393c1ead9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#afe72cc468f0b05f5e2ea508393c1ead9">RTE_SSP1_MISO_PIN_EN</a>   1</td></tr>
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<tr class="separator:afe72cc468f0b05f5e2ea508393c1ead9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5320da7eac618cd39f95a1c57f663b40"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a5320da7eac618cd39f95a1c57f663b40">RTE_SSP1_MOSI_PIN_SEL</a>   1</td></tr>
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<tr class="separator:a5320da7eac618cd39f95a1c57f663b40"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a316bc34562a46cb4b450a54f3f8ae31b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a316bc34562a46cb4b450a54f3f8ae31b">RTE_SSP1_MOSI_PORT</a>   0</td></tr>
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<tr class="separator:a316bc34562a46cb4b450a54f3f8ae31b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a81250f70b31c9a8864411a8d319b3050"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a81250f70b31c9a8864411a8d319b3050">RTE_SSP1_MOSI_BIT</a>   9</td></tr>
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<tr class="separator:a81250f70b31c9a8864411a8d319b3050"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab5fcd8961cd297c858701d90d76c8103"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ab5fcd8961cd297c858701d90d76c8103">RTE_SSP1_MOSI_FUNC</a>   2</td></tr>
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<tr class="separator:ab5fcd8961cd297c858701d90d76c8103"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a49940c282059188832cfad9c73041fbe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a49940c282059188832cfad9c73041fbe">RTE_SSP1_MOSI_PIN_EN</a>   1</td></tr>
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<tr class="separator:a49940c282059188832cfad9c73041fbe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9f9df3008ba2edc6dd93f71fec0cc2cd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a9f9df3008ba2edc6dd93f71fec0cc2cd">RTE_SSP1_DMA_TX_EN</a>   0</td></tr>
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<tr class="separator:a9f9df3008ba2edc6dd93f71fec0cc2cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2c8b5c681fe76f66d5791d4b6d79b84c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2c8b5c681fe76f66d5791d4b6d79b84c">RTE_SSP1_DMA_TX_CH</a>   2</td></tr>
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<tr class="separator:a2c8b5c681fe76f66d5791d4b6d79b84c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aeb18854d7cb05d010083540574b36f88"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aeb18854d7cb05d010083540574b36f88">RTE_SSP1_DMA_RX_EN</a>   0</td></tr>
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<tr class="separator:aeb18854d7cb05d010083540574b36f88"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a659c41e5972dc3f3c56ddb5a2c8fe416"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a659c41e5972dc3f3c56ddb5a2c8fe416">RTE_SSP1_DMA_RX_CH</a>   3</td></tr>
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<tr class="separator:a659c41e5972dc3f3c56ddb5a2c8fe416"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab9764210f1b9c6b6e5ef861267500659"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ab9764210f1b9c6b6e5ef861267500659">RTE_SPI</a>   1</td></tr>
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<tr class="separator:ab9764210f1b9c6b6e5ef861267500659"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abb0b54b4036addd6b4577a2e70abb172"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#abb0b54b4036addd6b4577a2e70abb172">RTE_SPI_SSEL_PIN_SEL</a>   1</td></tr>
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<tr class="separator:abb0b54b4036addd6b4577a2e70abb172"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2a8c5b80e45c16ffc12aacb3fc9d3420"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2a8c5b80e45c16ffc12aacb3fc9d3420">RTE_SPI_SSEL_PORT</a>   0</td></tr>
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<tr class="separator:a2a8c5b80e45c16ffc12aacb3fc9d3420"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aceafef04def4f7088bdfd357fa0694b0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aceafef04def4f7088bdfd357fa0694b0">RTE_SPI_SSEL_BIT</a>   16</td></tr>
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<tr class="separator:aceafef04def4f7088bdfd357fa0694b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa07f07b52fe940f5bfdc22c8754e807e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aa07f07b52fe940f5bfdc22c8754e807e">RTE_SPI_SSEL_FUNC</a>   3</td></tr>
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<tr class="separator:aa07f07b52fe940f5bfdc22c8754e807e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad5f3036f26ef9629af0d9b096523f002"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ad5f3036f26ef9629af0d9b096523f002">RTE_SPI_SSEL_PIN_EN</a>   1</td></tr>
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<tr class="separator:ad5f3036f26ef9629af0d9b096523f002"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aed5191da25e44a2ef579726348c5f1b0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aed5191da25e44a2ef579726348c5f1b0">RTE_SPI_SCK_PIN_SEL</a>   0</td></tr>
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<tr class="separator:aed5191da25e44a2ef579726348c5f1b0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a561b04f6fd7d12701b05b95a21c56806"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a561b04f6fd7d12701b05b95a21c56806">RTE_SPI_SCK_PORT</a>   0</td></tr>
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<tr class="separator:a561b04f6fd7d12701b05b95a21c56806"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1f84e3a4b2d1edc43f5ebd2f31707fbc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a1f84e3a4b2d1edc43f5ebd2f31707fbc">RTE_SPI_SCK_BIT</a>   15</td></tr>
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<tr class="separator:a1f84e3a4b2d1edc43f5ebd2f31707fbc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac5dc9b39ac1e0a0ba28028e9c3811400"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ac5dc9b39ac1e0a0ba28028e9c3811400">RTE_SPI_SCK_FUNC</a>   3</td></tr>
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<tr class="separator:ac5dc9b39ac1e0a0ba28028e9c3811400"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae7b16632faaef82ab0b2528fbbbab1b6"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ae7b16632faaef82ab0b2528fbbbab1b6">RTE_SPI_MISO_PIN_SEL</a>   1</td></tr>
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<tr class="separator:ae7b16632faaef82ab0b2528fbbbab1b6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab6fd8ca89edabc65eed06cafd746422e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ab6fd8ca89edabc65eed06cafd746422e">RTE_SPI_MISO_PORT</a>   0</td></tr>
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<tr class="separator:ab6fd8ca89edabc65eed06cafd746422e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a75ed5949badf54ffbefeae074612b6a9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a75ed5949badf54ffbefeae074612b6a9">RTE_SPI_MISO_BIT</a>   17</td></tr>
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<tr class="separator:a75ed5949badf54ffbefeae074612b6a9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a257ee75b3e0667edb54e5c96aa038f17"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a257ee75b3e0667edb54e5c96aa038f17">RTE_SPI_MISO_FUNC</a>   3</td></tr>
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<tr class="separator:a257ee75b3e0667edb54e5c96aa038f17"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a17584d9009e87e9b8a7bf3151df8ea5f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a17584d9009e87e9b8a7bf3151df8ea5f">RTE_SPI_MISO_PIN_EN</a>   1</td></tr>
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<tr class="separator:a17584d9009e87e9b8a7bf3151df8ea5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa49d76b9a29417ae786f64099e389fe9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aa49d76b9a29417ae786f64099e389fe9">RTE_SPI_MOSI_PIN_SEL</a>   1</td></tr>
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<tr class="separator:aa49d76b9a29417ae786f64099e389fe9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9eb88c41625f62ea25385b1e2f10b4ff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a9eb88c41625f62ea25385b1e2f10b4ff">RTE_SPI_MOSI_PORT</a>   0</td></tr>
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<tr class="separator:a9eb88c41625f62ea25385b1e2f10b4ff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2d75942dd3f7be6b0385b657c329e861"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2d75942dd3f7be6b0385b657c329e861">RTE_SPI_MOSI_BIT</a>   18</td></tr>
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<tr class="separator:a2d75942dd3f7be6b0385b657c329e861"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a86caed3ecdd7801cd6b8ab4feaae3008"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a86caed3ecdd7801cd6b8ab4feaae3008">RTE_SPI_MOSI_FUNC</a>   3</td></tr>
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<tr class="separator:a86caed3ecdd7801cd6b8ab4feaae3008"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af5c974d30395d7ca35e7b1c5efffe2ff"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#af5c974d30395d7ca35e7b1c5efffe2ff">RTE_SPI_MOSI_PIN_EN</a>   1</td></tr>
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<tr class="separator:af5c974d30395d7ca35e7b1c5efffe2ff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acad31a3875356218f3360eb41602f296"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#acad31a3875356218f3360eb41602f296">RTE_I2S0</a>   0</td></tr>
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<tr class="separator:acad31a3875356218f3360eb41602f296"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8a45a2e1337fcc11f1d68fa0b841da4e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a8a45a2e1337fcc11f1d68fa0b841da4e">RTE_I2S0_RX_SCK_PIN_SEL</a>   1</td></tr>
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<tr class="separator:a8a45a2e1337fcc11f1d68fa0b841da4e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad004f3c94820924efba0e6a5e64e17fe"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ad004f3c94820924efba0e6a5e64e17fe">RTE_I2S0_RX_SCK_PORT</a>   0</td></tr>
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<tr class="separator:ad004f3c94820924efba0e6a5e64e17fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab306c298ecab35b9165750490e1ed9c3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ab306c298ecab35b9165750490e1ed9c3">RTE_I2S0_RX_SCK_BIT</a>   4</td></tr>
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<tr class="separator:ab306c298ecab35b9165750490e1ed9c3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa05803e39e40a24970a66300f971c71c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aa05803e39e40a24970a66300f971c71c">RTE_I2S0_RX_SCK_FUNC</a>   1</td></tr>
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<tr class="separator:aa05803e39e40a24970a66300f971c71c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adc3193af2345cebac8d4ae07e2bb47b7"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#adc3193af2345cebac8d4ae07e2bb47b7">RTE_I2S0_RX_SCK_PIN_EN</a>   1</td></tr>
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<tr class="separator:adc3193af2345cebac8d4ae07e2bb47b7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad0badd38be636ab15781dcb926f98a76"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ad0badd38be636ab15781dcb926f98a76">RTE_I2S0_RX_WS_PIN_SEL</a>   1</td></tr>
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<tr class="separator:ad0badd38be636ab15781dcb926f98a76"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a958b61eab9bde3891292b4bbac1dda78"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a958b61eab9bde3891292b4bbac1dda78">RTE_I2S0_RX_WS_PORT</a>   0</td></tr>
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<tr class="separator:a958b61eab9bde3891292b4bbac1dda78"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae12155c33cac5f58e5ff327103257d37"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ae12155c33cac5f58e5ff327103257d37">RTE_I2S0_RX_WS_BIT</a>   5</td></tr>
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<tr class="separator:ae12155c33cac5f58e5ff327103257d37"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6a4b5a6b54f65505748d6d557abb514d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a6a4b5a6b54f65505748d6d557abb514d">RTE_I2S0_RX_WS_FUNC</a>   1</td></tr>
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<tr class="separator:a6a4b5a6b54f65505748d6d557abb514d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a443bb0733db2dd8aa76f7ccd5746d8bb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a443bb0733db2dd8aa76f7ccd5746d8bb">RTE_I2S0_RX_WS_PIN_EN</a>   1</td></tr>
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<tr class="separator:a443bb0733db2dd8aa76f7ccd5746d8bb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa1094711a0534511d03b4f36df78553e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aa1094711a0534511d03b4f36df78553e">RTE_I2S0_RX_SDA_PIN_SEL</a>   1</td></tr>
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<tr class="separator:aa1094711a0534511d03b4f36df78553e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af07c712fd991d830abfa3ad5ab3606fd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#af07c712fd991d830abfa3ad5ab3606fd">RTE_I2S0_RX_SDA_PORT</a>   0</td></tr>
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<tr class="separator:af07c712fd991d830abfa3ad5ab3606fd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae584ed08d6b0ce4cced8e1db16a60c28"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ae584ed08d6b0ce4cced8e1db16a60c28">RTE_I2S0_RX_SDA_BIT</a>   6</td></tr>
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<tr class="separator:ae584ed08d6b0ce4cced8e1db16a60c28"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a56e03446170a8bc82c7e5c03a78e8a58"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a56e03446170a8bc82c7e5c03a78e8a58">RTE_I2S0_RX_SDA_FUNC</a>   1</td></tr>
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<tr class="separator:a56e03446170a8bc82c7e5c03a78e8a58"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3d72c7d9623aa75b7378f9908bc638e1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a3d72c7d9623aa75b7378f9908bc638e1">RTE_I2S0_RX_SDA_PIN_EN</a>   1</td></tr>
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<tr class="separator:a3d72c7d9623aa75b7378f9908bc638e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa4b8fe9c541de141e25dece50f8f1054"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#aa4b8fe9c541de141e25dece50f8f1054">RTE_I2S0_RX_MCLK_PIN_SEL</a>   0</td></tr>
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<tr class="separator:aa4b8fe9c541de141e25dece50f8f1054"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a44923db82e446786ebd137d20c274336"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a44923db82e446786ebd137d20c274336">RTE_I2S0_RX_MCLK_PIN_EN</a>   0</td></tr>
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<tr class="separator:a44923db82e446786ebd137d20c274336"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8a3f39c56854f810c1b9321e477f82b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a8a3f39c56854f810c1b9321e477f82b3">RTE_I2S0_TX_SCK_PIN_SEL</a>   1</td></tr>
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<tr class="separator:a8a3f39c56854f810c1b9321e477f82b3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9d047abda8a426fc6b65efc680973274"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a9d047abda8a426fc6b65efc680973274">RTE_I2S0_TX_SCK_PORT</a>   0</td></tr>
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<tr class="separator:a9d047abda8a426fc6b65efc680973274"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6651b4a10934b10919ebb94c278c6217"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a6651b4a10934b10919ebb94c278c6217">RTE_I2S0_TX_SCK_BIT</a>   7</td></tr>
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<tr class="separator:a6651b4a10934b10919ebb94c278c6217"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6675103354ccb3ae33422c02dd9d9a7c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a6675103354ccb3ae33422c02dd9d9a7c">RTE_I2S0_TX_SCK_FUNC</a>   1</td></tr>
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<tr class="separator:a6675103354ccb3ae33422c02dd9d9a7c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a93b066bb7ac7558e91cd156b3bd91277"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a93b066bb7ac7558e91cd156b3bd91277">RTE_I2S0_TX_SCK_PIN_EN</a>   1</td></tr>
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<tr class="separator:a93b066bb7ac7558e91cd156b3bd91277"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a844bbcb6f7e59861f11f72bff60764ac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a844bbcb6f7e59861f11f72bff60764ac">RTE_I2S0_TX_WS_PIN_SEL</a>   1</td></tr>
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<tr class="separator:a844bbcb6f7e59861f11f72bff60764ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8fb366e985e8c15ad21e0ec681c7e7db"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a8fb366e985e8c15ad21e0ec681c7e7db">RTE_I2S0_TX_WS_PORT</a>   0</td></tr>
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<tr class="separator:a8fb366e985e8c15ad21e0ec681c7e7db"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a07a295b05e30359a5123ff62affcd51a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a07a295b05e30359a5123ff62affcd51a">RTE_I2S0_TX_WS_BIT</a>   8</td></tr>
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<tr class="separator:a07a295b05e30359a5123ff62affcd51a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af41d966c239ee654a83797fc53eec85e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#af41d966c239ee654a83797fc53eec85e">RTE_I2S0_TX_WS_FUNC</a>   1</td></tr>
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<tr class="separator:af41d966c239ee654a83797fc53eec85e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3e006b5406d466bb0f5e5b9dafa5688b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a3e006b5406d466bb0f5e5b9dafa5688b">RTE_I2S0_TX_WS_PIN_EN</a>   1</td></tr>
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<tr class="separator:a3e006b5406d466bb0f5e5b9dafa5688b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2a182b091bd3b420b5541af3b29401d5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a2a182b091bd3b420b5541af3b29401d5">RTE_I2S0_TX_SDA_PIN_SEL</a>   1</td></tr>
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<tr class="separator:a2a182b091bd3b420b5541af3b29401d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5141c623e2c7806280389b2e09dd16e0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a5141c623e2c7806280389b2e09dd16e0">RTE_I2S0_TX_SDA_PORT</a>   0</td></tr>
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<tr class="separator:a5141c623e2c7806280389b2e09dd16e0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af883cc7143f7d5a63356f324e6e7f976"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#af883cc7143f7d5a63356f324e6e7f976">RTE_I2S0_TX_SDA_BIT</a>   9</td></tr>
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<tr class="separator:af883cc7143f7d5a63356f324e6e7f976"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a76ff46f1ac6d54e0fea69b283814d317"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a76ff46f1ac6d54e0fea69b283814d317">RTE_I2S0_TX_SDA_FUNC</a>   1</td></tr>
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<tr class="separator:a76ff46f1ac6d54e0fea69b283814d317"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3cf7455f4c4379145f7ebdc630cad1bb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a3cf7455f4c4379145f7ebdc630cad1bb">RTE_I2S0_TX_SDA_PIN_EN</a>   1</td></tr>
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<tr class="separator:a3cf7455f4c4379145f7ebdc630cad1bb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afb46714e40005769cd148542903c2419"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#afb46714e40005769cd148542903c2419">RTE_I2S0_TX_MCLK_PIN_SEL</a>   1</td></tr>
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<tr class="separator:afb46714e40005769cd148542903c2419"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae791f5d5742a73011537accb5b5b001b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ae791f5d5742a73011537accb5b5b001b">RTE_I2S0_TX_MCLK_PORT</a>   4</td></tr>
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<tr class="separator:ae791f5d5742a73011537accb5b5b001b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a35c50c54d2be03a0154b2e84c80d8e0e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a35c50c54d2be03a0154b2e84c80d8e0e">RTE_I2S0_TX_MCLK_BIT</a>   29</td></tr>
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<tr class="separator:a35c50c54d2be03a0154b2e84c80d8e0e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a690a02bafa1dea1ffefa6b64f15cc2ac"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a690a02bafa1dea1ffefa6b64f15cc2ac">RTE_I2S0_TX_MCLK_FUNC</a>   1</td></tr>
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<tr class="separator:a690a02bafa1dea1ffefa6b64f15cc2ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afd2677206556c52baf129431e7708227"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#afd2677206556c52baf129431e7708227">RTE_I2S0_TX_MCLK_PIN_EN</a>   1</td></tr>
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<tr class="separator:afd2677206556c52baf129431e7708227"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3443b2595b7253f5889aa4937b4ef540"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a3443b2595b7253f5889aa4937b4ef540">RTE_I2S0_DMA_TX_EN</a>   1</td></tr>
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<tr class="separator:a3443b2595b7253f5889aa4937b4ef540"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6ac4248d186a45fc58569cb48cc5c10b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a6ac4248d186a45fc58569cb48cc5c10b">RTE_I2S0_DMA_TX_CH</a>   0</td></tr>
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<tr class="separator:a6ac4248d186a45fc58569cb48cc5c10b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac6fadda5b5a1186e2c627f8df73696f5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#ac6fadda5b5a1186e2c627f8df73696f5">RTE_I2S0_DMA_RX_EN</a>   1</td></tr>
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<tr class="separator:ac6fadda5b5a1186e2c627f8df73696f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a74dc64bf1b57e3948e8e58a46db1f748"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="_r_t_e___device_8h.html#a74dc64bf1b57e3948e8e58a46db1f748">RTE_I2S0_DMA_RX_CH</a>   1</td></tr>
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<tr class="separator:a74dc64bf1b57e3948e8e58a46db1f748"><td class="memSeparator" colspan="2"> </td></tr>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#ad00eaa388906f82f72936b15afa603ed">◆ </a></span>RTE_CAN1_RD_ID</h2>
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<td class="memname">#define RTE_CAN1_RD_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a50d710b56297d35cdde96ecbe3a81024">◆ </a></span>RTE_CAN1_RD_PIN_EN</h2>
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<td class="memname">#define RTE_CAN1_RD_PIN_EN   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#acbe26bdcc74039a53d667c5100b36614">◆ </a></span>RTE_CAN1_TD_ID</h2>
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<td class="memname">#define RTE_CAN1_TD_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a8c7b370096ec9709c41c9e2346553354">◆ </a></span>RTE_CAN1_TD_PIN_EN</h2>
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<td class="memname">#define RTE_CAN1_TD_PIN_EN   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a5bb2e03d5baa28680bf3c7379a6f52dc">◆ </a></span>RTE_CAN2_RD_ID</h2>
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<td class="memname">#define RTE_CAN2_RD_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a64f8ca15ab3017246e85f4fea2ac22e3">◆ </a></span>RTE_CAN2_RD_PIN_EN</h2>
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<td class="memname">#define RTE_CAN2_RD_PIN_EN   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a02d518e7e540c61d27e95758db802b15">◆ </a></span>RTE_CAN2_TD_ID</h2>
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<td class="memname">#define RTE_CAN2_TD_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aaebdb69c860f36d799d2f5888360e8f4">◆ </a></span>RTE_CAN2_TD_PIN_EN</h2>
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<td class="memname">#define RTE_CAN2_TD_PIN_EN   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a326d4ecd87c8ca6cfdb72db4b1983ae0">◆ </a></span>RTE_CAN_CAN1</h2>
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<td class="memname">#define RTE_CAN_CAN1   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a5fcb76fe6d18a009f90a21cd1b87efdb">◆ </a></span>RTE_CAN_CAN2</h2>
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<td class="memname">#define RTE_CAN_CAN2   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a5f84b60d40fb4c0dd627450ebc0d59c8">◆ </a></span>RTE_ENET</h2>
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<td class="memname">#define RTE_ENET   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a7119d0bce44bfd5d344fa04b812717d9">◆ </a></span>RTE_ENET_MDI_MDC_FUNC</h2>
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<td class="memname">#define RTE_ENET_MDI_MDC_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a046ff7f77d9f5d7416faa4541b36ccfd">◆ </a></span>RTE_ENET_MDI_MDC_PIN</h2>
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<td class="memname">#define RTE_ENET_MDI_MDC_PIN   16</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a590db99351a115b061256aea62f35ccf">◆ </a></span>RTE_ENET_MDI_MDC_PORT</h2>
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<td class="memname">#define RTE_ENET_MDI_MDC_PORT   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a838aceb9f407e126d19314b4a9fb2fac">◆ </a></span>RTE_ENET_MDI_MDC_PORT_ID</h2>
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<td class="memname">#define RTE_ENET_MDI_MDC_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a307ba2cfa165a3d54505b1795f1bb72b">◆ </a></span>RTE_ENET_MDI_MDIO_FUNC</h2>
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<td class="memname">#define RTE_ENET_MDI_MDIO_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a1a390ae28955a3f382121202a0cbc35a">◆ </a></span>RTE_ENET_MDI_MDIO_PIN</h2>
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<td class="memname">#define RTE_ENET_MDI_MDIO_PIN   17</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a27a385aa0cb2711b7ba39b55b516cc36">◆ </a></span>RTE_ENET_MDI_MDIO_PORT</h2>
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<td class="memname">#define RTE_ENET_MDI_MDIO_PORT   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a96d15918268614854f433a7651d403a4">◆ </a></span>RTE_ENET_MDI_MDIO_PORT_ID</h2>
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<td class="memname">#define RTE_ENET_MDI_MDIO_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#adecddcbc68dd85118497ac432e8ade20">◆ </a></span>RTE_ENET_RMII</h2>
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<td class="memname">#define RTE_ENET_RMII   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a8416da9f0955de9003fdf24dac82f739">◆ </a></span>RTE_ENET_RMII_CRS_FUNC</h2>
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<td class="memname">#define RTE_ENET_RMII_CRS_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ab1396a4622b463fe5a871a6180695f4c">◆ </a></span>RTE_ENET_RMII_CRS_PIN</h2>
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<td class="memname">#define RTE_ENET_RMII_CRS_PIN   8</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ac6776c3b13de4dcdb3cace1c60b70844">◆ </a></span>RTE_ENET_RMII_CRS_PORT</h2>
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<td class="memname">#define RTE_ENET_RMII_CRS_PORT   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ae60219609242f18871244c8c90ffa626">◆ </a></span>RTE_ENET_RMII_CRS_PORT_ID</h2>
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<td class="memname">#define RTE_ENET_RMII_CRS_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ab4b0e1e787b6bba7cf319dba2381f554">◆ </a></span>RTE_ENET_RMII_REF_CLK_FUNC</h2>
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<td class="memname">#define RTE_ENET_RMII_REF_CLK_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a376f30753b2a3711be5069b1cdf34085">◆ </a></span>RTE_ENET_RMII_REF_CLK_PIN</h2>
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<td class="memname">#define RTE_ENET_RMII_REF_CLK_PIN   15</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a422e0ec99ed51e84e5980f1e25a7f57c">◆ </a></span>RTE_ENET_RMII_REF_CLK_PORT</h2>
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<td class="memname">#define RTE_ENET_RMII_REF_CLK_PORT   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#af92feb99708a324edaf4a66e51ed7340">◆ </a></span>RTE_ENET_RMII_REF_CLK_PORT_ID</h2>
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<td class="memname">#define RTE_ENET_RMII_REF_CLK_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a7d685a108f02314978eddcbcf4fb8dca">◆ </a></span>RTE_ENET_RMII_RX_ER_FUNC</h2>
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<td class="memname">#define RTE_ENET_RMII_RX_ER_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a959db22b2b37e5446e26fda98de4ab91">◆ </a></span>RTE_ENET_RMII_RX_ER_PIN</h2>
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<td class="memname">#define RTE_ENET_RMII_RX_ER_PIN   14</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a286ef8ddb9fef8fda60a257698778376">◆ </a></span>RTE_ENET_RMII_RX_ER_PORT</h2>
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<td class="memname">#define RTE_ENET_RMII_RX_ER_PORT   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a43b423ed6026e77223995edb0e475864">◆ </a></span>RTE_ENET_RMII_RX_ER_PORT_ID</h2>
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<td class="memname">#define RTE_ENET_RMII_RX_ER_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa3eb0822bdd61035d91faae307f4721d">◆ </a></span>RTE_ENET_RMII_RXD0_FUNC</h2>
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<td class="memname">#define RTE_ENET_RMII_RXD0_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3d6e1695c8a10e6bc42b5854f55cce47">◆ </a></span>RTE_ENET_RMII_RXD0_PIN</h2>
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<td class="memname">#define RTE_ENET_RMII_RXD0_PIN   9</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a4c049ecf05d503b9c8ec2bf14e073e21">◆ </a></span>RTE_ENET_RMII_RXD0_PORT</h2>
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<td class="memname">#define RTE_ENET_RMII_RXD0_PORT   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ab12d48baed93c47bc1dda458ee61d0d0">◆ </a></span>RTE_ENET_RMII_RXD0_PORT_ID</h2>
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<td class="memname">#define RTE_ENET_RMII_RXD0_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aacaeefc080acb6d9bb024ed57a9db4a0">◆ </a></span>RTE_ENET_RMII_RXD1_FUNC</h2>
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<td class="memname">#define RTE_ENET_RMII_RXD1_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aacfda78c8391125c539c610fb66cad5f">◆ </a></span>RTE_ENET_RMII_RXD1_PIN</h2>
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<td class="memname">#define RTE_ENET_RMII_RXD1_PIN   10</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a69f433c0e9ace2d288fd2ab17466060c">◆ </a></span>RTE_ENET_RMII_RXD1_PORT</h2>
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<td class="memname">#define RTE_ENET_RMII_RXD1_PORT   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2f5d9565c875525e33f3093e6a6209a4">◆ </a></span>RTE_ENET_RMII_RXD1_PORT_ID</h2>
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<td class="memname">#define RTE_ENET_RMII_RXD1_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a4ca89a23d05e1e5f19ceccf80501cd6a">◆ </a></span>RTE_ENET_RMII_TX_EN_FUNC</h2>
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<td class="memname">#define RTE_ENET_RMII_TX_EN_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a7dceb1da711b8ad414e71da8b6957916">◆ </a></span>RTE_ENET_RMII_TX_EN_PIN</h2>
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<td class="memname">#define RTE_ENET_RMII_TX_EN_PIN   4</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3bebc3bfedc3b3a427aae2bc4d0718dd">◆ </a></span>RTE_ENET_RMII_TX_EN_PORT</h2>
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<td class="memname">#define RTE_ENET_RMII_TX_EN_PORT   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ab1d637b7af67d3a673dd632e79c902fb">◆ </a></span>RTE_ENET_RMII_TX_EN_PORT_ID</h2>
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<td class="memname">#define RTE_ENET_RMII_TX_EN_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ab1959f2a6e6c8cc51652c3cb0c58511c">◆ </a></span>RTE_ENET_RMII_TXD0_FUNC</h2>
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<td class="memname">#define RTE_ENET_RMII_TXD0_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aae724f0b79a32ac0fe80d5ed749bda30">◆ </a></span>RTE_ENET_RMII_TXD0_PIN</h2>
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<td class="memname">#define RTE_ENET_RMII_TXD0_PIN   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a68c3636e0d972fa13b61d80bbc384a2f">◆ </a></span>RTE_ENET_RMII_TXD0_PORT</h2>
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<td class="memname">#define RTE_ENET_RMII_TXD0_PORT   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a349248062017fd013214338a58d947c7">◆ </a></span>RTE_ENET_RMII_TXD0_PORT_ID</h2>
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<td class="memname">#define RTE_ENET_RMII_TXD0_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#afa06452aefaf0ebb821b4f5228b3b0ed">◆ </a></span>RTE_ENET_RMII_TXD1_FUNC</h2>
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<td class="memname">#define RTE_ENET_RMII_TXD1_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a75a3ef1bcb4d33f9a8985e4a3076b884">◆ </a></span>RTE_ENET_RMII_TXD1_PIN</h2>
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<td class="memname">#define RTE_ENET_RMII_TXD1_PIN   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a034ef231e89bcabe448142e166a34376">◆ </a></span>RTE_ENET_RMII_TXD1_PORT</h2>
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<td class="memname">#define RTE_ENET_RMII_TXD1_PORT   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a0c209b8277074d785c220f0fd76dc0ae">◆ </a></span>RTE_ENET_RMII_TXD1_PORT_ID</h2>
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<td class="memname">#define RTE_ENET_RMII_TXD1_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#afdae116c2c595573ddee8725b6a4602a">◆ </a></span>RTE_I2C0</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a16b57c9e56e6bc66cc301d9c9a5767ec">◆ </a></span>RTE_I2C0_SCL_FUNC</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a2edc42e46a1c49b9c227d5b9b908cb71">◆ </a></span>RTE_I2C0_SCL_PIN</h2>
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<td class="memname">#define RTE_I2C0_SCL_PIN   28</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2ea1e6bddee42e3341664acfc7f7f3ba">◆ </a></span>RTE_I2C0_SCL_PORT</h2>
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<td class="memname">#define RTE_I2C0_SCL_PORT   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aff858373bf316e029fe765d8d6801792">◆ </a></span>RTE_I2C0_SCL_PORT_ID</h2>
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<td class="memname">#define RTE_I2C0_SCL_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aed5f4774dea040f15609f57ec198c8f2">◆ </a></span>RTE_I2C0_SDA_FUNC</h2>
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<td class="memname">#define RTE_I2C0_SDA_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#acbff94c65d03a4b842e6dc17ea979cff">◆ </a></span>RTE_I2C0_SDA_PIN</h2>
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<td class="memname">#define RTE_I2C0_SDA_PIN   27</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a6728318d028d1fdd84eec2399fbfca17">◆ </a></span>RTE_I2C0_SDA_PORT</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a551ce5cdc353ceffe01cd785cc381157">◆ </a></span>RTE_I2C0_SDA_PORT_ID</h2>
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<td class="memname">#define RTE_I2C0_SDA_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa4264010a207548708e4eb5030b77b42">◆ </a></span>RTE_I2C1</h2>
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<td class="memname">#define RTE_I2C1   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa19b4c9a165be8d6785471dd641ba82e">◆ </a></span>RTE_I2C1_SCL_FUNC</h2>
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<td class="memname">#define RTE_I2C1_SCL_FUNC   3</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a20585e3256c3bf992e706d6301da9f5f">◆ </a></span>RTE_I2C1_SCL_PIN</h2>
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<td class="memname">#define RTE_I2C1_SCL_PIN   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a043e7dfd69c669ff538b0140f61450dd">◆ </a></span>RTE_I2C1_SCL_PORT</h2>
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<td class="memname">#define RTE_I2C1_SCL_PORT   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2422c10368e946f81371faa508fda920">◆ </a></span>RTE_I2C1_SCL_PORT_ID</h2>
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<td class="memname">#define RTE_I2C1_SCL_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ae8f9af8de00cbe11f124416158b10480">◆ </a></span>RTE_I2C1_SDA_FUNC</h2>
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<td class="memname">#define RTE_I2C1_SDA_FUNC   3</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a72617dd6c167f7165abc2bb18372a11b">◆ </a></span>RTE_I2C1_SDA_PIN</h2>
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<td class="memname">#define RTE_I2C1_SDA_PIN   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a69b761f8a46ccd974ba87ea641d48987">◆ </a></span>RTE_I2C1_SDA_PORT</h2>
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<td class="memname">#define RTE_I2C1_SDA_PORT   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aedee90b93ad5a9547e648ff4492badad">◆ </a></span>RTE_I2C1_SDA_PORT_ID</h2>
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<td class="memname">#define RTE_I2C1_SDA_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a6b312911602934f2275e5bfdd964a3c2">◆ </a></span>RTE_I2C2</h2>
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<td class="memname">#define RTE_I2C2   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a12577c3bb59550ce3d32b0cd8a1f3698">◆ </a></span>RTE_I2C2_SCL_FUNC</h2>
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<td class="memname">#define RTE_I2C2_SCL_FUNC   2</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ab9a83c24e199daf104c72f5a94580bf0">◆ </a></span>RTE_I2C2_SCL_PIN</h2>
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<td class="memname">#define RTE_I2C2_SCL_PIN   11</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a8994f5bb7cdd25119c912245d6e2abd0">◆ </a></span>RTE_I2C2_SCL_PORT</h2>
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<td class="memname">#define RTE_I2C2_SCL_PORT   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a04f0f3965a79dc8aebc2c5c0cc5fe7cf">◆ </a></span>RTE_I2C2_SCL_PORT_ID</h2>
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<td class="memname">#define RTE_I2C2_SCL_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aba227fc9424875cc01b31be871d7423c">◆ </a></span>RTE_I2C2_SDA_FUNC</h2>
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<td class="memname">#define RTE_I2C2_SDA_FUNC   2</td>
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<a id="a91d41fb93262cdf7c5df0549f7e67383"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a91d41fb93262cdf7c5df0549f7e67383">◆ </a></span>RTE_I2C2_SDA_PIN</h2>
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<td class="memname">#define RTE_I2C2_SDA_PIN   10</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2494b618e7af4097c7b6d0962d481786">◆ </a></span>RTE_I2C2_SDA_PORT</h2>
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<td class="memname">#define RTE_I2C2_SDA_PORT   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a971ec319ac1dca25f61b8d6fe0e9b9d2">◆ </a></span>RTE_I2C2_SDA_PORT_ID</h2>
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<td class="memname">#define RTE_I2C2_SDA_PORT_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#acad31a3875356218f3360eb41602f296">◆ </a></span>RTE_I2S0</h2>
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<td class="memname">#define RTE_I2S0   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a74dc64bf1b57e3948e8e58a46db1f748">◆ </a></span>RTE_I2S0_DMA_RX_CH</h2>
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<td class="memname">#define RTE_I2S0_DMA_RX_CH   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ac6fadda5b5a1186e2c627f8df73696f5">◆ </a></span>RTE_I2S0_DMA_RX_EN</h2>
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<td class="memname">#define RTE_I2S0_DMA_RX_EN   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a6ac4248d186a45fc58569cb48cc5c10b">◆ </a></span>RTE_I2S0_DMA_TX_CH</h2>
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<td class="memname">#define RTE_I2S0_DMA_TX_CH   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3443b2595b7253f5889aa4937b4ef540">◆ </a></span>RTE_I2S0_DMA_TX_EN</h2>
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<td class="memname">#define RTE_I2S0_DMA_TX_EN   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a44923db82e446786ebd137d20c274336">◆ </a></span>RTE_I2S0_RX_MCLK_PIN_EN</h2>
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<td class="memname">#define RTE_I2S0_RX_MCLK_PIN_EN   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa4b8fe9c541de141e25dece50f8f1054">◆ </a></span>RTE_I2S0_RX_MCLK_PIN_SEL</h2>
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<td class="memname">#define RTE_I2S0_RX_MCLK_PIN_SEL   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ab306c298ecab35b9165750490e1ed9c3">◆ </a></span>RTE_I2S0_RX_SCK_BIT</h2>
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<td class="memname">#define RTE_I2S0_RX_SCK_BIT   4</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa05803e39e40a24970a66300f971c71c">◆ </a></span>RTE_I2S0_RX_SCK_FUNC</h2>
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<td class="memname">#define RTE_I2S0_RX_SCK_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#adc3193af2345cebac8d4ae07e2bb47b7">◆ </a></span>RTE_I2S0_RX_SCK_PIN_EN</h2>
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<td class="memname">#define RTE_I2S0_RX_SCK_PIN_EN   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a8a45a2e1337fcc11f1d68fa0b841da4e">◆ </a></span>RTE_I2S0_RX_SCK_PIN_SEL</h2>
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<td class="memname">#define RTE_I2S0_RX_SCK_PIN_SEL   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ad004f3c94820924efba0e6a5e64e17fe">◆ </a></span>RTE_I2S0_RX_SCK_PORT</h2>
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<td class="memname">#define RTE_I2S0_RX_SCK_PORT   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ae584ed08d6b0ce4cced8e1db16a60c28">◆ </a></span>RTE_I2S0_RX_SDA_BIT</h2>
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<td class="memname">#define RTE_I2S0_RX_SDA_BIT   6</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a56e03446170a8bc82c7e5c03a78e8a58">◆ </a></span>RTE_I2S0_RX_SDA_FUNC</h2>
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<td class="memname">#define RTE_I2S0_RX_SDA_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3d72c7d9623aa75b7378f9908bc638e1">◆ </a></span>RTE_I2S0_RX_SDA_PIN_EN</h2>
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<td class="memname">#define RTE_I2S0_RX_SDA_PIN_EN   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa1094711a0534511d03b4f36df78553e">◆ </a></span>RTE_I2S0_RX_SDA_PIN_SEL</h2>
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<td class="memname">#define RTE_I2S0_RX_SDA_PIN_SEL   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#af07c712fd991d830abfa3ad5ab3606fd">◆ </a></span>RTE_I2S0_RX_SDA_PORT</h2>
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<td class="memname">#define RTE_I2S0_RX_SDA_PORT   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ae12155c33cac5f58e5ff327103257d37">◆ </a></span>RTE_I2S0_RX_WS_BIT</h2>
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<td class="memname">#define RTE_I2S0_RX_WS_BIT   5</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a6a4b5a6b54f65505748d6d557abb514d">◆ </a></span>RTE_I2S0_RX_WS_FUNC</h2>
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<td class="memname">#define RTE_I2S0_RX_WS_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a443bb0733db2dd8aa76f7ccd5746d8bb">◆ </a></span>RTE_I2S0_RX_WS_PIN_EN</h2>
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<td class="memname">#define RTE_I2S0_RX_WS_PIN_EN   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ad0badd38be636ab15781dcb926f98a76">◆ </a></span>RTE_I2S0_RX_WS_PIN_SEL</h2>
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<td class="memname">#define RTE_I2S0_RX_WS_PIN_SEL   1</td>
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<a id="a958b61eab9bde3891292b4bbac1dda78"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a958b61eab9bde3891292b4bbac1dda78">◆ </a></span>RTE_I2S0_RX_WS_PORT</h2>
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<td class="memname">#define RTE_I2S0_RX_WS_PORT   0</td>
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<a id="a35c50c54d2be03a0154b2e84c80d8e0e"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a35c50c54d2be03a0154b2e84c80d8e0e">◆ </a></span>RTE_I2S0_TX_MCLK_BIT</h2>
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<td class="memname">#define RTE_I2S0_TX_MCLK_BIT   29</td>
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<a id="a690a02bafa1dea1ffefa6b64f15cc2ac"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a690a02bafa1dea1ffefa6b64f15cc2ac">◆ </a></span>RTE_I2S0_TX_MCLK_FUNC</h2>
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<td class="memname">#define RTE_I2S0_TX_MCLK_FUNC   1</td>
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<a id="afd2677206556c52baf129431e7708227"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#afd2677206556c52baf129431e7708227">◆ </a></span>RTE_I2S0_TX_MCLK_PIN_EN</h2>
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<td class="memname">#define RTE_I2S0_TX_MCLK_PIN_EN   1</td>
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<a id="afb46714e40005769cd148542903c2419"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#afb46714e40005769cd148542903c2419">◆ </a></span>RTE_I2S0_TX_MCLK_PIN_SEL</h2>
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<td class="memname">#define RTE_I2S0_TX_MCLK_PIN_SEL   1</td>
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<a id="ae791f5d5742a73011537accb5b5b001b"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ae791f5d5742a73011537accb5b5b001b">◆ </a></span>RTE_I2S0_TX_MCLK_PORT</h2>
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<td class="memname">#define RTE_I2S0_TX_MCLK_PORT   4</td>
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<a id="a6651b4a10934b10919ebb94c278c6217"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a6651b4a10934b10919ebb94c278c6217">◆ </a></span>RTE_I2S0_TX_SCK_BIT</h2>
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<td class="memname">#define RTE_I2S0_TX_SCK_BIT   7</td>
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<a id="a6675103354ccb3ae33422c02dd9d9a7c"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a6675103354ccb3ae33422c02dd9d9a7c">◆ </a></span>RTE_I2S0_TX_SCK_FUNC</h2>
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<td class="memname">#define RTE_I2S0_TX_SCK_FUNC   1</td>
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<a id="a93b066bb7ac7558e91cd156b3bd91277"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a93b066bb7ac7558e91cd156b3bd91277">◆ </a></span>RTE_I2S0_TX_SCK_PIN_EN</h2>
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<td class="memname">#define RTE_I2S0_TX_SCK_PIN_EN   1</td>
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<a id="a8a3f39c56854f810c1b9321e477f82b3"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a8a3f39c56854f810c1b9321e477f82b3">◆ </a></span>RTE_I2S0_TX_SCK_PIN_SEL</h2>
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<td class="memname">#define RTE_I2S0_TX_SCK_PIN_SEL   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a9d047abda8a426fc6b65efc680973274">◆ </a></span>RTE_I2S0_TX_SCK_PORT</h2>
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<td class="memname">#define RTE_I2S0_TX_SCK_PORT   0</td>
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<a id="af883cc7143f7d5a63356f324e6e7f976"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#af883cc7143f7d5a63356f324e6e7f976">◆ </a></span>RTE_I2S0_TX_SDA_BIT</h2>
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<td class="memname">#define RTE_I2S0_TX_SDA_BIT   9</td>
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<a id="a76ff46f1ac6d54e0fea69b283814d317"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a76ff46f1ac6d54e0fea69b283814d317">◆ </a></span>RTE_I2S0_TX_SDA_FUNC</h2>
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<td class="memname">#define RTE_I2S0_TX_SDA_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3cf7455f4c4379145f7ebdc630cad1bb">◆ </a></span>RTE_I2S0_TX_SDA_PIN_EN</h2>
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<td class="memname">#define RTE_I2S0_TX_SDA_PIN_EN   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2a182b091bd3b420b5541af3b29401d5">◆ </a></span>RTE_I2S0_TX_SDA_PIN_SEL</h2>
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<td class="memname">#define RTE_I2S0_TX_SDA_PIN_SEL   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a5141c623e2c7806280389b2e09dd16e0">◆ </a></span>RTE_I2S0_TX_SDA_PORT</h2>
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<td class="memname">#define RTE_I2S0_TX_SDA_PORT   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a07a295b05e30359a5123ff62affcd51a">◆ </a></span>RTE_I2S0_TX_WS_BIT</h2>
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<td class="memname">#define RTE_I2S0_TX_WS_BIT   8</td>
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<h2 class="memtitle"><span class="permalink"><a href="#af41d966c239ee654a83797fc53eec85e">◆ </a></span>RTE_I2S0_TX_WS_FUNC</h2>
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<td class="memname">#define RTE_I2S0_TX_WS_FUNC   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3e006b5406d466bb0f5e5b9dafa5688b">◆ </a></span>RTE_I2S0_TX_WS_PIN_EN</h2>
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<td class="memname">#define RTE_I2S0_TX_WS_PIN_EN   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a844bbcb6f7e59861f11f72bff60764ac">◆ </a></span>RTE_I2S0_TX_WS_PIN_SEL</h2>
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<td class="memname">#define RTE_I2S0_TX_WS_PIN_SEL   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a8fb366e985e8c15ad21e0ec681c7e7db">◆ </a></span>RTE_I2S0_TX_WS_PORT</h2>
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<td class="memname">#define RTE_I2S0_TX_WS_PORT   0</td>
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<a id="ab9764210f1b9c6b6e5ef861267500659"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ab9764210f1b9c6b6e5ef861267500659">◆ </a></span>RTE_SPI</h2>
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<td class="memname">#define RTE_SPI   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a75ed5949badf54ffbefeae074612b6a9">◆ </a></span>RTE_SPI_MISO_BIT</h2>
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<td class="memname">#define RTE_SPI_MISO_BIT   17</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a257ee75b3e0667edb54e5c96aa038f17">◆ </a></span>RTE_SPI_MISO_FUNC</h2>
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<td class="memname">#define RTE_SPI_MISO_FUNC   3</td>
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<a id="a17584d9009e87e9b8a7bf3151df8ea5f"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a17584d9009e87e9b8a7bf3151df8ea5f">◆ </a></span>RTE_SPI_MISO_PIN_EN</h2>
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<td class="memname">#define RTE_SPI_MISO_PIN_EN   1</td>
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<a id="ae7b16632faaef82ab0b2528fbbbab1b6"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ae7b16632faaef82ab0b2528fbbbab1b6">◆ </a></span>RTE_SPI_MISO_PIN_SEL</h2>
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<td class="memname">#define RTE_SPI_MISO_PIN_SEL   1</td>
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<a id="ab6fd8ca89edabc65eed06cafd746422e"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ab6fd8ca89edabc65eed06cafd746422e">◆ </a></span>RTE_SPI_MISO_PORT</h2>
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<td class="memname">#define RTE_SPI_MISO_PORT   0</td>
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<a id="a2d75942dd3f7be6b0385b657c329e861"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a2d75942dd3f7be6b0385b657c329e861">◆ </a></span>RTE_SPI_MOSI_BIT</h2>
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<td class="memname">#define RTE_SPI_MOSI_BIT   18</td>
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<a id="a86caed3ecdd7801cd6b8ab4feaae3008"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a86caed3ecdd7801cd6b8ab4feaae3008">◆ </a></span>RTE_SPI_MOSI_FUNC</h2>
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<td class="memname">#define RTE_SPI_MOSI_FUNC   3</td>
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<a id="af5c974d30395d7ca35e7b1c5efffe2ff"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#af5c974d30395d7ca35e7b1c5efffe2ff">◆ </a></span>RTE_SPI_MOSI_PIN_EN</h2>
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<td class="memname">#define RTE_SPI_MOSI_PIN_EN   1</td>
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<a id="aa49d76b9a29417ae786f64099e389fe9"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#aa49d76b9a29417ae786f64099e389fe9">◆ </a></span>RTE_SPI_MOSI_PIN_SEL</h2>
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<td class="memname">#define RTE_SPI_MOSI_PIN_SEL   1</td>
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<a id="a9eb88c41625f62ea25385b1e2f10b4ff"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a9eb88c41625f62ea25385b1e2f10b4ff">◆ </a></span>RTE_SPI_MOSI_PORT</h2>
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<td class="memname">#define RTE_SPI_MOSI_PORT   0</td>
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<a id="a1f84e3a4b2d1edc43f5ebd2f31707fbc"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a1f84e3a4b2d1edc43f5ebd2f31707fbc">◆ </a></span>RTE_SPI_SCK_BIT</h2>
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<td class="memname">#define RTE_SPI_SCK_BIT   15</td>
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<a id="ac5dc9b39ac1e0a0ba28028e9c3811400"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ac5dc9b39ac1e0a0ba28028e9c3811400">◆ </a></span>RTE_SPI_SCK_FUNC</h2>
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<td class="memname">#define RTE_SPI_SCK_FUNC   3</td>
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<a id="aed5191da25e44a2ef579726348c5f1b0"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#aed5191da25e44a2ef579726348c5f1b0">◆ </a></span>RTE_SPI_SCK_PIN_SEL</h2>
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<td class="memname">#define RTE_SPI_SCK_PIN_SEL   0</td>
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<a id="a561b04f6fd7d12701b05b95a21c56806"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a561b04f6fd7d12701b05b95a21c56806">◆ </a></span>RTE_SPI_SCK_PORT</h2>
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<td class="memname">#define RTE_SPI_SCK_PORT   0</td>
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<a id="aceafef04def4f7088bdfd357fa0694b0"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#aceafef04def4f7088bdfd357fa0694b0">◆ </a></span>RTE_SPI_SSEL_BIT</h2>
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<td class="memname">#define RTE_SPI_SSEL_BIT   16</td>
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<a id="aa07f07b52fe940f5bfdc22c8754e807e"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#aa07f07b52fe940f5bfdc22c8754e807e">◆ </a></span>RTE_SPI_SSEL_FUNC</h2>
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<td class="memname">#define RTE_SPI_SSEL_FUNC   3</td>
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<a id="ad5f3036f26ef9629af0d9b096523f002"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ad5f3036f26ef9629af0d9b096523f002">◆ </a></span>RTE_SPI_SSEL_PIN_EN</h2>
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<td class="memname">#define RTE_SPI_SSEL_PIN_EN   1</td>
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<a id="abb0b54b4036addd6b4577a2e70abb172"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#abb0b54b4036addd6b4577a2e70abb172">◆ </a></span>RTE_SPI_SSEL_PIN_SEL</h2>
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<td class="memname">#define RTE_SPI_SSEL_PIN_SEL   1</td>
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<a id="a2a8c5b80e45c16ffc12aacb3fc9d3420"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a2a8c5b80e45c16ffc12aacb3fc9d3420">◆ </a></span>RTE_SPI_SSEL_PORT</h2>
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<td class="memname">#define RTE_SPI_SSEL_PORT   0</td>
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<a id="a98f8c818193c955748112623a367af2f"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a98f8c818193c955748112623a367af2f">◆ </a></span>RTE_SSP0</h2>
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<td class="memname">#define RTE_SSP0   1</td>
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<a id="ae2f15c004b56fb9b434ec60ceff4e478"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ae2f15c004b56fb9b434ec60ceff4e478">◆ </a></span>RTE_SSP0_DMA_RX_CH</h2>
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<td class="memname">#define RTE_SSP0_DMA_RX_CH   1</td>
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<a id="adb01a4654df85c32e4b46c007ece0b45"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#adb01a4654df85c32e4b46c007ece0b45">◆ </a></span>RTE_SSP0_DMA_RX_EN</h2>
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<td class="memname">#define RTE_SSP0_DMA_RX_EN   0</td>
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<a id="addf240dd8e4cd3e336cd595834fbff58"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#addf240dd8e4cd3e336cd595834fbff58">◆ </a></span>RTE_SSP0_DMA_TX_CH</h2>
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<td class="memname">#define RTE_SSP0_DMA_TX_CH   0</td>
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<a id="a78ea0b13a99d1c9b2dec00b6c52fa8f2"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a78ea0b13a99d1c9b2dec00b6c52fa8f2">◆ </a></span>RTE_SSP0_DMA_TX_EN</h2>
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<td class="memname">#define RTE_SSP0_DMA_TX_EN   0</td>
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<a id="a4bd3a1e08f115de8f252fc6262c31397"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a4bd3a1e08f115de8f252fc6262c31397">◆ </a></span>RTE_SSP0_MISO_BIT</h2>
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<td class="memname">#define RTE_SSP0_MISO_BIT   17</td>
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<a id="a97688d4ea37c8385032de0e74230735e"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a97688d4ea37c8385032de0e74230735e">◆ </a></span>RTE_SSP0_MISO_FUNC</h2>
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<td class="memname">#define RTE_SSP0_MISO_FUNC   2</td>
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<a id="a7c5b97f6efa12d4802897b18e74bb32b"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a7c5b97f6efa12d4802897b18e74bb32b">◆ </a></span>RTE_SSP0_MISO_PIN_EN</h2>
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<td class="memname">#define RTE_SSP0_MISO_PIN_EN   1</td>
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<a id="ab9fcb134aba8b5ac6ef51c03516d6772"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ab9fcb134aba8b5ac6ef51c03516d6772">◆ </a></span>RTE_SSP0_MISO_PIN_SEL</h2>
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<td class="memname">#define RTE_SSP0_MISO_PIN_SEL   1</td>
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<a id="ac99a73535cbeb3ac0ff5993539919775"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ac99a73535cbeb3ac0ff5993539919775">◆ </a></span>RTE_SSP0_MISO_PORT</h2>
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<td class="memname">#define RTE_SSP0_MISO_PORT   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#af70a3119627cd96b152582c4551d9c03">◆ </a></span>RTE_SSP0_MOSI_BIT</h2>
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<td class="memname">#define RTE_SSP0_MOSI_BIT   18</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a414963c0a75c796935205ad03aa7cb36">◆ </a></span>RTE_SSP0_MOSI_FUNC</h2>
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<td class="memname">#define RTE_SSP0_MOSI_FUNC   2</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ae8f4d5b905758a77e8e53c3a6568bb07">◆ </a></span>RTE_SSP0_MOSI_PIN_EN</h2>
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<td class="memname">#define RTE_SSP0_MOSI_PIN_EN   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a3cdd5d454557c6b7dedab79b0f9ed200">◆ </a></span>RTE_SSP0_MOSI_PIN_SEL</h2>
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<td class="memname">#define RTE_SSP0_MOSI_PIN_SEL   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a8b01cbb2428f39864df480b6ea09c680">◆ </a></span>RTE_SSP0_MOSI_PORT</h2>
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<td class="memname">#define RTE_SSP0_MOSI_PORT   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a5ac21a7368393d4ba2897471575daf3a">◆ </a></span>RTE_SSP0_SCK_BIT</h2>
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<td class="memname">#define RTE_SSP0_SCK_BIT   15</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aad3ff66db457277ce3ad0cf9356464d6">◆ </a></span>RTE_SSP0_SCK_FUNC</h2>
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<td class="memname">#define RTE_SSP0_SCK_FUNC   2</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a60c5bfd3dddc134d29bcbe2b043ce0b4">◆ </a></span>RTE_SSP0_SCK_PIN_SEL</h2>
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<td class="memname">#define RTE_SSP0_SCK_PIN_SEL   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aa8119695f7ba82ad9fda44b7012e3995">◆ </a></span>RTE_SSP0_SCK_PORT</h2>
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<td class="memname">#define RTE_SSP0_SCK_PORT   0</td>
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<a id="acce1f8da9f1d4bb98730f4a63d4693e6"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#acce1f8da9f1d4bb98730f4a63d4693e6">◆ </a></span>RTE_SSP0_SSEL_BIT</h2>
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<td class="memname">#define RTE_SSP0_SSEL_BIT   16</td>
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<a id="ab8bc0d51050e105577d3b37092653857"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ab8bc0d51050e105577d3b37092653857">◆ </a></span>RTE_SSP0_SSEL_FUNC</h2>
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<td class="memname">#define RTE_SSP0_SSEL_FUNC   2</td>
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<a id="adb637f5152d8597f031dfe5f82022753"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#adb637f5152d8597f031dfe5f82022753">◆ </a></span>RTE_SSP0_SSEL_PIN_EN</h2>
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<td class="memname">#define RTE_SSP0_SSEL_PIN_EN   1</td>
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<a id="a181dad6deaf19754094caf13a587ed89"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a181dad6deaf19754094caf13a587ed89">◆ </a></span>RTE_SSP0_SSEL_PIN_SEL</h2>
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<td class="memname">#define RTE_SSP0_SSEL_PIN_SEL   1</td>
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<a id="a4645634741fc25ade272ebf0086ea2c7"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a4645634741fc25ade272ebf0086ea2c7">◆ </a></span>RTE_SSP0_SSEL_PORT</h2>
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<td class="memname">#define RTE_SSP0_SSEL_PORT   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2a0c96b5957baead0d14f04f61005614">◆ </a></span>RTE_SSP1</h2>
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<td class="memname">#define RTE_SSP1   1</td>
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<a id="a659c41e5972dc3f3c56ddb5a2c8fe416"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a659c41e5972dc3f3c56ddb5a2c8fe416">◆ </a></span>RTE_SSP1_DMA_RX_CH</h2>
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<td class="memname">#define RTE_SSP1_DMA_RX_CH   3</td>
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<a id="aeb18854d7cb05d010083540574b36f88"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#aeb18854d7cb05d010083540574b36f88">◆ </a></span>RTE_SSP1_DMA_RX_EN</h2>
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<td class="memname">#define RTE_SSP1_DMA_RX_EN   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2c8b5c681fe76f66d5791d4b6d79b84c">◆ </a></span>RTE_SSP1_DMA_TX_CH</h2>
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<td class="memname">#define RTE_SSP1_DMA_TX_CH   2</td>
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<a id="a9f9df3008ba2edc6dd93f71fec0cc2cd"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a9f9df3008ba2edc6dd93f71fec0cc2cd">◆ </a></span>RTE_SSP1_DMA_TX_EN</h2>
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<td class="memname">#define RTE_SSP1_DMA_TX_EN   0</td>
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<a id="a89c0d735b894ed527d2e446a9a2f7d18"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a89c0d735b894ed527d2e446a9a2f7d18">◆ </a></span>RTE_SSP1_MISO_BIT</h2>
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<td class="memname">#define RTE_SSP1_MISO_BIT   8</td>
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<a id="a0fb88c12651957635fb173460d699619"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a0fb88c12651957635fb173460d699619">◆ </a></span>RTE_SSP1_MISO_FUNC</h2>
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<td class="memname">#define RTE_SSP1_MISO_FUNC   2</td>
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<a id="afe72cc468f0b05f5e2ea508393c1ead9"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#afe72cc468f0b05f5e2ea508393c1ead9">◆ </a></span>RTE_SSP1_MISO_PIN_EN</h2>
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<td class="memname">#define RTE_SSP1_MISO_PIN_EN   1</td>
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<a id="abdc026a3f82851fe25479290a527d767"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#abdc026a3f82851fe25479290a527d767">◆ </a></span>RTE_SSP1_MISO_PIN_SEL</h2>
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<td class="memname">#define RTE_SSP1_MISO_PIN_SEL   1</td>
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<a id="a390a64d3cfbe165aeec0ecdc2becf0e9"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a390a64d3cfbe165aeec0ecdc2becf0e9">◆ </a></span>RTE_SSP1_MISO_PORT</h2>
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<td class="memname">#define RTE_SSP1_MISO_PORT   0</td>
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<a id="a81250f70b31c9a8864411a8d319b3050"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a81250f70b31c9a8864411a8d319b3050">◆ </a></span>RTE_SSP1_MOSI_BIT</h2>
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<td class="memname">#define RTE_SSP1_MOSI_BIT   9</td>
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<a id="ab5fcd8961cd297c858701d90d76c8103"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ab5fcd8961cd297c858701d90d76c8103">◆ </a></span>RTE_SSP1_MOSI_FUNC</h2>
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<td class="memname">#define RTE_SSP1_MOSI_FUNC   2</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a49940c282059188832cfad9c73041fbe">◆ </a></span>RTE_SSP1_MOSI_PIN_EN</h2>
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<td class="memname">#define RTE_SSP1_MOSI_PIN_EN   1</td>
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<a id="a5320da7eac618cd39f95a1c57f663b40"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a5320da7eac618cd39f95a1c57f663b40">◆ </a></span>RTE_SSP1_MOSI_PIN_SEL</h2>
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<td class="memname">#define RTE_SSP1_MOSI_PIN_SEL   1</td>
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<a id="a316bc34562a46cb4b450a54f3f8ae31b"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a316bc34562a46cb4b450a54f3f8ae31b">◆ </a></span>RTE_SSP1_MOSI_PORT</h2>
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<td class="memname">#define RTE_SSP1_MOSI_PORT   0</td>
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<a id="a1941f0c23f86411d5008f516b5881cdc"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a1941f0c23f86411d5008f516b5881cdc">◆ </a></span>RTE_SSP1_SCK_BIT</h2>
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<td class="memname">#define RTE_SSP1_SCK_BIT   7</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ac73fe8ab90c4e279922001c383ab3c51">◆ </a></span>RTE_SSP1_SCK_FUNC</h2>
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<td class="memname">#define RTE_SSP1_SCK_FUNC   2</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a26602f64477d33e39b8fd49fbf935c6d">◆ </a></span>RTE_SSP1_SCK_PIN_SEL</h2>
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<td class="memname">#define RTE_SSP1_SCK_PIN_SEL   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2196958f2dbf778221c1214c86c21376">◆ </a></span>RTE_SSP1_SCK_PORT</h2>
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<td class="memname">#define RTE_SSP1_SCK_PORT   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a5c7b741b263e11d1db4095fd0ab9174c">◆ </a></span>RTE_SSP1_SSEL_BIT</h2>
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<td class="memname">#define RTE_SSP1_SSEL_BIT   6</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a79df869a05c916475f483588356f3391">◆ </a></span>RTE_SSP1_SSEL_FUNC</h2>
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<td class="memname">#define RTE_SSP1_SSEL_FUNC   2</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a36773ffd863e5892e92d35402070ba44">◆ </a></span>RTE_SSP1_SSEL_PIN_EN</h2>
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<td class="memname">#define RTE_SSP1_SSEL_PIN_EN   1</td>
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<a id="a83c2b398a041dac0006a474f4f3ba944"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a83c2b398a041dac0006a474f4f3ba944">◆ </a></span>RTE_SSP1_SSEL_PIN_SEL</h2>
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<td class="memname">#define RTE_SSP1_SSEL_PIN_SEL   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a474f20638a962ed9da32123c46f22009">◆ </a></span>RTE_SSP1_SSEL_PORT</h2>
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<td class="memname">#define RTE_SSP1_SSEL_PORT   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a8639dd9ee646b6cefcd45f7597da18d1">◆ </a></span>RTE_UART0</h2>
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<td class="memname">#define RTE_UART0   0</td>
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<a id="a77d34bc38199a005c82c8ed02ca204f1"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a77d34bc38199a005c82c8ed02ca204f1">◆ </a></span>RTE_UART0_DMA_RX_CH</h2>
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<td class="memname">#define RTE_UART0_DMA_RX_CH   1</td>
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<a id="a0beb8239ec9323a103c2b921a82363f5"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a0beb8239ec9323a103c2b921a82363f5">◆ </a></span>RTE_UART0_DMA_RX_EN</h2>
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<td class="memname">#define RTE_UART0_DMA_RX_EN   1</td>
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<a id="a2773642f6f269580e576af5f4e0155cb"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a2773642f6f269580e576af5f4e0155cb">◆ </a></span>RTE_UART0_DMA_TX_CH</h2>
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<td class="memname">#define RTE_UART0_DMA_TX_CH   0</td>
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<a id="a1addccf315e07c48226077eef30afc84"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a1addccf315e07c48226077eef30afc84">◆ </a></span>RTE_UART0_DMA_TX_EN</h2>
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<td class="memname">#define RTE_UART0_DMA_TX_EN   1</td>
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<a id="af367f08c81fb13d7cab7841a4032f367"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#af367f08c81fb13d7cab7841a4032f367">◆ </a></span>RTE_UART0_RX_ID</h2>
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<td class="memname">#define RTE_UART0_RX_ID   0</td>
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<a id="aad8c5eaf6024b3e65699b28f0899e330"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#aad8c5eaf6024b3e65699b28f0899e330">◆ </a></span>RTE_UART0_RX_PIN_EN</h2>
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<td class="memname">#define RTE_UART0_RX_PIN_EN   0</td>
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<a id="a5996866b91a203ec4cf10ff1f10a128a"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a5996866b91a203ec4cf10ff1f10a128a">◆ </a></span>RTE_UART0_TX_ID</h2>
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<td class="memname">#define RTE_UART0_TX_ID   0</td>
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<a id="a12d85483cafb6e96c9604c21599af53d"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a12d85483cafb6e96c9604c21599af53d">◆ </a></span>RTE_UART0_TX_PIN_EN</h2>
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<td class="memname">#define RTE_UART0_TX_PIN_EN   0</td>
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<a id="a679626ce9217aa64938039aa66c56c05"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a679626ce9217aa64938039aa66c56c05">◆ </a></span>RTE_UART1</h2>
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<td class="memname">#define RTE_UART1   0</td>
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<a id="a9e3bdba84713d523b3d00dd0eb8628fd"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a9e3bdba84713d523b3d00dd0eb8628fd">◆ </a></span>RTE_UART1_CTS_ID</h2>
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<td class="memname">#define RTE_UART1_CTS_ID   0</td>
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<a id="a9c881e4f68592f378b2d096db76dfbcb"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a9c881e4f68592f378b2d096db76dfbcb">◆ </a></span>RTE_UART1_CTS_PIN_EN</h2>
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<td class="memname">#define RTE_UART1_CTS_PIN_EN   0</td>
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<a id="ae26dc5ba7e59a413425460044cea5b9f"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ae26dc5ba7e59a413425460044cea5b9f">◆ </a></span>RTE_UART1_DCD_ID</h2>
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<td class="memname">#define RTE_UART1_DCD_ID   0</td>
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<a id="a2ecaf88ec78c71eda10eb1ed1c60d84f"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a2ecaf88ec78c71eda10eb1ed1c60d84f">◆ </a></span>RTE_UART1_DCD_PIN_EN</h2>
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<td class="memname">#define RTE_UART1_DCD_PIN_EN   0</td>
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<a id="a423c193d166e75cdd722176ac4d5abfb"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a423c193d166e75cdd722176ac4d5abfb">◆ </a></span>RTE_UART1_DMA_RX_CH</h2>
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<td class="memname">#define RTE_UART1_DMA_RX_CH   1</td>
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<a id="a2d00b073e75ffca3d6244fb33219b613"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a2d00b073e75ffca3d6244fb33219b613">◆ </a></span>RTE_UART1_DMA_RX_EN</h2>
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<td class="memname">#define RTE_UART1_DMA_RX_EN   1</td>
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<a id="ab35f2580ec735e254f33555d47d17381"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ab35f2580ec735e254f33555d47d17381">◆ </a></span>RTE_UART1_DMA_TX_CH</h2>
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<td class="memname">#define RTE_UART1_DMA_TX_CH   0</td>
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<a id="a6f6427ccf5dda78bbcae99138a9b6c4e"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a6f6427ccf5dda78bbcae99138a9b6c4e">◆ </a></span>RTE_UART1_DMA_TX_EN</h2>
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<td class="memname">#define RTE_UART1_DMA_TX_EN   1</td>
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<a id="af514c4c05a427153f63e1e303063d52c"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#af514c4c05a427153f63e1e303063d52c">◆ </a></span>RTE_UART1_DSR_ID</h2>
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<td class="memname">#define RTE_UART1_DSR_ID   0</td>
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<a id="a96d567704c0092be10648020494844da"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a96d567704c0092be10648020494844da">◆ </a></span>RTE_UART1_DSR_PIN_EN</h2>
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<td class="memname">#define RTE_UART1_DSR_PIN_EN   0</td>
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<a id="a796fcfbefa88367642e657562866701a"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a796fcfbefa88367642e657562866701a">◆ </a></span>RTE_UART1_DTR_ID</h2>
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<td class="memname">#define RTE_UART1_DTR_ID   0</td>
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<a id="a2f756be798b56297accd8c39b9a7abf2"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a2f756be798b56297accd8c39b9a7abf2">◆ </a></span>RTE_UART1_DTR_PIN_EN</h2>
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<td class="memname">#define RTE_UART1_DTR_PIN_EN   0</td>
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<a id="a420bc5736f477da5ca3c917ec74b56fa"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a420bc5736f477da5ca3c917ec74b56fa">◆ </a></span>RTE_UART1_RI_ID</h2>
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<td class="memname">#define RTE_UART1_RI_ID   0</td>
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<a id="ad08f0a8dc63831553be03b0385aea414"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ad08f0a8dc63831553be03b0385aea414">◆ </a></span>RTE_UART1_RI_PIN_EN</h2>
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<td class="memname">#define RTE_UART1_RI_PIN_EN   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a83f0308b301aa55076b9eb0cbb596f4d">◆ </a></span>RTE_UART1_RTS_ID</h2>
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<td class="memname">#define RTE_UART1_RTS_ID   0</td>
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<a id="a08e48879a79efb994ba6cf2a091c174a"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a08e48879a79efb994ba6cf2a091c174a">◆ </a></span>RTE_UART1_RTS_PIN_EN</h2>
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<td class="memname">#define RTE_UART1_RTS_PIN_EN   0</td>
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<a id="a09191f0241f496799a26d47c23f2e0bb"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a09191f0241f496799a26d47c23f2e0bb">◆ </a></span>RTE_UART1_RX_BIT</h2>
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<td class="memname">#define RTE_UART1_RX_BIT   16</td>
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<a id="a01049ed366ef8560c7660c8d55e41b59"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a01049ed366ef8560c7660c8d55e41b59">◆ </a></span>RTE_UART1_RX_FUNC</h2>
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<td class="memname">#define RTE_UART1_RX_FUNC   1</td>
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<a id="a319aaeb49e135c277d815f7b3cbfc6b6"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a319aaeb49e135c277d815f7b3cbfc6b6">◆ </a></span>RTE_UART1_RX_ID</h2>
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<td class="memname">#define RTE_UART1_RX_ID   1</td>
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<a id="a680787a2d026003a648a2700cb810f64"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a680787a2d026003a648a2700cb810f64">◆ </a></span>RTE_UART1_RX_PIN_EN</h2>
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<td class="memname">#define RTE_UART1_RX_PIN_EN   1</td>
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<a id="a6c8e95ccf09c84d0cb525828f9faf6e1"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a6c8e95ccf09c84d0cb525828f9faf6e1">◆ </a></span>RTE_UART1_RX_PORT</h2>
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<td class="memname">#define RTE_UART1_RX_PORT   0</td>
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<a id="aa1e45f413d8d98571cef5fc581493f01"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#aa1e45f413d8d98571cef5fc581493f01">◆ </a></span>RTE_UART1_TX_BIT</h2>
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<td class="memname">#define RTE_UART1_TX_BIT   15</td>
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<a id="a3a8c751b16638dff43c3f213c2b8ec6a"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a3a8c751b16638dff43c3f213c2b8ec6a">◆ </a></span>RTE_UART1_TX_FUNC</h2>
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<td class="memname">#define RTE_UART1_TX_FUNC   1</td>
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<a id="a5ba3412d06d640a19e683aa991c27bc2"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a5ba3412d06d640a19e683aa991c27bc2">◆ </a></span>RTE_UART1_TX_ID</h2>
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<td class="memname">#define RTE_UART1_TX_ID   1</td>
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<a id="afc43e8fe8742f9619d2ddcb25d562c82"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#afc43e8fe8742f9619d2ddcb25d562c82">◆ </a></span>RTE_UART1_TX_PIN_EN</h2>
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<td class="memname">#define RTE_UART1_TX_PIN_EN   1</td>
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<a id="a1b19c327066d352db55f63fdc8d7f4bf"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a1b19c327066d352db55f63fdc8d7f4bf">◆ </a></span>RTE_UART1_TX_PORT</h2>
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<td class="memname">#define RTE_UART1_TX_PORT   0</td>
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<a id="a5a852e968f447682fc3e2a8a1340bf34"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a5a852e968f447682fc3e2a8a1340bf34">◆ </a></span>RTE_UART2</h2>
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<td class="memname">#define RTE_UART2   0</td>
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<a id="ac7d0fe249612f405673530aab9ff86c3"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ac7d0fe249612f405673530aab9ff86c3">◆ </a></span>RTE_UART2_DMA_RX_CH</h2>
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<td class="memname">#define RTE_UART2_DMA_RX_CH   1</td>
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<a id="af925ce15f564b994f467e7d2e7a112c6"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#af925ce15f564b994f467e7d2e7a112c6">◆ </a></span>RTE_UART2_DMA_RX_EN</h2>
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<div class="memitem">
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<td class="memname">#define RTE_UART2_DMA_RX_EN   1</td>
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<a id="a803e0da232a48295368bb05718e2bcf3"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a803e0da232a48295368bb05718e2bcf3">◆ </a></span>RTE_UART2_DMA_TX_CH</h2>
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<div class="memitem">
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<td class="memname">#define RTE_UART2_DMA_TX_CH   0</td>
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<a id="ae1380d82222d77665bbcca5bcdede906"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ae1380d82222d77665bbcca5bcdede906">◆ </a></span>RTE_UART2_DMA_TX_EN</h2>
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<td class="memname">#define RTE_UART2_DMA_TX_EN   1</td>
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<a id="accbe8dbd2baa58d05dd86be119bf7cbb"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#accbe8dbd2baa58d05dd86be119bf7cbb">◆ </a></span>RTE_UART2_RX_ID</h2>
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<td class="memname">#define RTE_UART2_RX_ID   0</td>
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<a id="af3552f613ff864318c8df85ff2b1a3f8"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#af3552f613ff864318c8df85ff2b1a3f8">◆ </a></span>RTE_UART2_RX_PIN_EN</h2>
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<td class="memname">#define RTE_UART2_RX_PIN_EN   0</td>
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<a id="af987b6471cc7c5e7a6d37f37d1c5d781"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#af987b6471cc7c5e7a6d37f37d1c5d781">◆ </a></span>RTE_UART2_TX_ID</h2>
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<td class="memname">#define RTE_UART2_TX_ID   0</td>
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<a id="a47be884beac4ce9326401489abd83455"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a47be884beac4ce9326401489abd83455">◆ </a></span>RTE_UART2_TX_PIN_EN</h2>
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<td class="memname">#define RTE_UART2_TX_PIN_EN   0</td>
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<a id="a75510c1535eaf90294dce09aea4c8b6f"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a75510c1535eaf90294dce09aea4c8b6f">◆ </a></span>RTE_UART3</h2>
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<td class="memname">#define RTE_UART3   0</td>
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<a id="ad3e41d6188407499f751b4340ddf52bf"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ad3e41d6188407499f751b4340ddf52bf">◆ </a></span>RTE_UART3_DMA_RX_CH</h2>
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<td class="memname">#define RTE_UART3_DMA_RX_CH   1</td>
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<a id="a9479884692d4c76f3f6a4d1389af110f"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a9479884692d4c76f3f6a4d1389af110f">◆ </a></span>RTE_UART3_DMA_RX_EN</h2>
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<td class="memname">#define RTE_UART3_DMA_RX_EN   1</td>
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<a id="a2eff9fea2ed80947532f14ee67f87b3f"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a2eff9fea2ed80947532f14ee67f87b3f">◆ </a></span>RTE_UART3_DMA_TX_CH</h2>
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<td class="memname">#define RTE_UART3_DMA_TX_CH   0</td>
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<a id="a2eb6663e4a8212c12a3841ac5d37fffe"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a2eb6663e4a8212c12a3841ac5d37fffe">◆ </a></span>RTE_UART3_DMA_TX_EN</h2>
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<td class="memname">#define RTE_UART3_DMA_TX_EN   1</td>
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<a id="ac07b38e4f7217241d307d338575eb1f2"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ac07b38e4f7217241d307d338575eb1f2">◆ </a></span>RTE_UART3_RX_ID</h2>
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<td class="memname">#define RTE_UART3_RX_ID   0</td>
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<a id="a0010d8e1bb1cf97234c642b7ce33c995"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a0010d8e1bb1cf97234c642b7ce33c995">◆ </a></span>RTE_UART3_RX_PIN_EN</h2>
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<td class="memname">#define RTE_UART3_RX_PIN_EN   0</td>
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<a id="a9ae1a01dd80710da23bc959dd66459ce"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a9ae1a01dd80710da23bc959dd66459ce">◆ </a></span>RTE_UART3_TX_ID</h2>
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<td class="memname">#define RTE_UART3_TX_ID   0</td>
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<a id="aa4ea2b0834ca7d14bfb1c07d567e201b"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#aa4ea2b0834ca7d14bfb1c07d567e201b">◆ </a></span>RTE_UART3_TX_PIN_EN</h2>
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<div class="memitem">
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<td class="memname">#define RTE_UART3_TX_PIN_EN   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aafcaf7e3c397dc593e4920397a2d5740">◆ </a></span>RTE_USB_CONNECT_ID</h2>
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<td class="memname">#define RTE_USB_CONNECT_ID   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a0380c57772518a86cd36ff8f344e0c3a">◆ </a></span>RTE_USB_CONNECT_PIN_EN</h2>
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<td class="memname">#define RTE_USB_CONNECT_PIN_EN   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a8a570623b992b5b54754c49de9c0036f">◆ </a></span>RTE_USB_OVRCR_ID</h2>
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<td class="memname">#define RTE_USB_OVRCR_ID   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a47fd4660218e634ef00feeb8f282b235">◆ </a></span>RTE_USB_OVRCR_PIN_EN</h2>
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<td class="memname">#define RTE_USB_OVRCR_PIN_EN   0</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a2ce455a1a6fc31d58af431f580113f29">◆ </a></span>RTE_USB_PPWR_ID</h2>
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<td class="memname">#define RTE_USB_PPWR_ID   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#a14bf0dfb4f672f29e4310c12fcc90634">◆ </a></span>RTE_USB_PPWR_PIN_EN</h2>
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<td class="memname">#define RTE_USB_PPWR_PIN_EN   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#ad6759ef48ef399b62dc258836d65c1d3">◆ </a></span>RTE_USB_PWRD_ID</h2>
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<td class="memname">#define RTE_USB_PWRD_ID   1</td>
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<a id="ac41587d557505ba3f0e6307f5b250fd8"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ac41587d557505ba3f0e6307f5b250fd8">◆ </a></span>RTE_USB_PWRD_PIN_EN</h2>
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<td class="memname">#define RTE_USB_PWRD_PIN_EN   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#aaa4b793c5153d80024a672c51ead7efa">◆ </a></span>RTE_USB_UP_LED_ID</h2>
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<td class="memname">#define RTE_USB_UP_LED_ID   1</td>
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<h2 class="memtitle"><span class="permalink"><a href="#abb060213d7e1a42142752c3d98b99510">◆ </a></span>RTE_USB_UP_LED_PIN_EN</h2>
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<td class="memname">#define RTE_USB_UP_LED_PIN_EN   1</td>
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<a id="adca26d8c1e2fb7971df487479fcdb6d6"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#adca26d8c1e2fb7971df487479fcdb6d6">◆ </a></span>RTE_USB_USB0</h2>
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<td class="memname">#define RTE_USB_USB0   0</td>
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<a id="a8d80d02f0312c3538f7ed7c5e78bce42"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#a8d80d02f0312c3538f7ed7c5e78bce42">◆ </a></span>RTE_USB_VBUS_ID</h2>
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<td class="memname">#define RTE_USB_VBUS_ID   1</td>
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<a id="ab16cf7de0c182f651433b70723366dee"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ab16cf7de0c182f651433b70723366dee">◆ </a></span>RTE_USB_VBUS_PIN_EN</h2>
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<td class="memname">#define RTE_USB_VBUS_PIN_EN   1</td>
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