440 lines
12 KiB
Plaintext
440 lines
12 KiB
Plaintext
(pcb "/home/hendrik/Schreibtisch/Micro DIY System/Hardware/Extension Board/Extension_Board.dsn"
|
|
(parser
|
|
(string_quote ")
|
|
(space_in_quoted_tokens on)
|
|
(host_cad "KiCad's Pcbnew")
|
|
(host_version "4.0.7")
|
|
)
|
|
(resolution um 10)
|
|
(unit um)
|
|
(structure
|
|
(layer F.Cu
|
|
(type signal)
|
|
(property
|
|
(index 0)
|
|
)
|
|
)
|
|
(layer B.Cu
|
|
(type signal)
|
|
(property
|
|
(index 1)
|
|
)
|
|
)
|
|
(boundary
|
|
(rect pcb 131783 -97279 156894 -121769)
|
|
)
|
|
(via "Via[0-1]_600:400_um")
|
|
(rule
|
|
(width 250)
|
|
(clearance 200.1)
|
|
(clearance 200.1 (type default_smd))
|
|
(clearance 50 (type smd_smd))
|
|
)
|
|
)
|
|
(placement
|
|
(component "fpc:fpc-10-1.0mm"
|
|
(place J1 136398 -116586 front 270 (PN FPC))
|
|
)
|
|
(component Pin_Headers:Pin_Header_Straight_1x08_Pitch2.54mm
|
|
(place J2 140208 -118364 front 180 (PN 1to1))
|
|
)
|
|
(component Pin_Headers:Pin_Header_Straight_1x16_Pitch1.00mm
|
|
(place J3 143002 -101854 front 0 (PN Conn_01x16))
|
|
(place J4 149860 -101854 front 0 (PN Conn_01x16))
|
|
(place J5 152146 -101854 front 0 (PN Conn_01x16))
|
|
(place J6 147574 -101854 front 0 (PN Conn_01x16))
|
|
(place J7 145288 -101854 front 0 (PN Conn_01x16))
|
|
)
|
|
)
|
|
(library
|
|
(image "fpc:fpc-10-1.0mm"
|
|
(outline (path signal 150 -12000 1575 -2100 1575))
|
|
(outline (path signal 150 -12000 -1575 -1950 -1575))
|
|
(outline (path signal 150 -12000 -1575 -12000 -3450))
|
|
(outline (path signal 150 -1950 -1575 -1950 -3450))
|
|
(outline (path signal 150 -12000 -3450 -15100 -3450))
|
|
(outline (path signal 150 -1950 -3450 1150 -3450))
|
|
(outline (path signal 150 -15100 -3450 -15100 -200))
|
|
(outline (path signal 150 1150 -3450 1150 -200))
|
|
(outline (path signal 150 -15100 -200 -12000 -200))
|
|
(outline (path signal 150 1150 -200 -1980 -200))
|
|
(outline (path signal 150 -12000 -200 -12000 1575))
|
|
(outline (path signal 150 -2030 -200 -2030 1575))
|
|
(pin Rect[T]Pad_700x2700_um 1 -11500 0)
|
|
(pin Rect[T]Pad_700x2700_um 2 -10500 0)
|
|
(pin Rect[T]Pad_700x2700_um 3 -9500 0)
|
|
(pin Rect[T]Pad_700x2700_um 4 -8500 0)
|
|
(pin Rect[T]Pad_700x2700_um 5 -7500 0)
|
|
(pin Rect[T]Pad_700x2700_um 6 -6500 0)
|
|
(pin Rect[T]Pad_700x2700_um 7 -5500 0)
|
|
(pin Rect[T]Pad_700x2700_um 8 -4500 0)
|
|
(pin Rect[T]Pad_700x2700_um 9 -3500 0)
|
|
(pin Rect[T]Pad_700x2700_um 10 -2500 0)
|
|
(pin Rect[T]Pad_2100x2800_um 0 -13600 -1900)
|
|
(pin Rect[T]Pad_2100x2800_um 0@1 -410 -1890)
|
|
)
|
|
(image Pin_Headers:Pin_Header_Straight_1x08_Pitch2.54mm
|
|
(outline (path signal 100 -635 1270 1270 1270))
|
|
(outline (path signal 100 1270 1270 1270 -19050))
|
|
(outline (path signal 100 1270 -19050 -1270 -19050))
|
|
(outline (path signal 100 -1270 -19050 -1270 635))
|
|
(outline (path signal 100 -1270 635 -635 1270))
|
|
(outline (path signal 120 -1330 -19110 1330 -19110))
|
|
(outline (path signal 120 -1330 -1270 -1330 -19110))
|
|
(outline (path signal 120 1330 -1270 1330 -19110))
|
|
(outline (path signal 120 -1330 -1270 1330 -1270))
|
|
(outline (path signal 120 -1330 0 -1330 1330))
|
|
(outline (path signal 120 -1330 1330 0 1330))
|
|
(outline (path signal 50 -1800 1800 -1800 -19550))
|
|
(outline (path signal 50 -1800 -19550 1800 -19550))
|
|
(outline (path signal 50 1800 -19550 1800 1800))
|
|
(outline (path signal 50 1800 1800 -1800 1800))
|
|
(pin Rect[A]Pad_1700x1700_um 1 0 0)
|
|
(pin Oval[A]Pad_1700x1700_um 2 0 -2540)
|
|
(pin Oval[A]Pad_1700x1700_um 3 0 -5080)
|
|
(pin Oval[A]Pad_1700x1700_um 4 0 -7620)
|
|
(pin Oval[A]Pad_1700x1700_um 5 0 -10160)
|
|
(pin Oval[A]Pad_1700x1700_um 6 0 -12700)
|
|
(pin Oval[A]Pad_1700x1700_um 7 0 -15240)
|
|
(pin Oval[A]Pad_1700x1700_um 8 0 -17780)
|
|
)
|
|
(image Pin_Headers:Pin_Header_Straight_1x16_Pitch1.00mm
|
|
(outline (path signal 100 -317.5 500 635 500))
|
|
(outline (path signal 100 635 500 635 -15500))
|
|
(outline (path signal 100 635 -15500 -635 -15500))
|
|
(outline (path signal 100 -635 -15500 -635 182.5))
|
|
(outline (path signal 100 -635 182.5 -317.5 500))
|
|
(outline (path signal 120 -695 -15560 -394.493 -15560))
|
|
(outline (path signal 120 394.493 -15560 695 -15560))
|
|
(outline (path signal 120 -695 -685 -695 -15560))
|
|
(outline (path signal 120 695 -685 695 -15560))
|
|
(outline (path signal 120 -695 -685 -608.276 -685))
|
|
(outline (path signal 120 608.276 -685 695 -685))
|
|
(outline (path signal 120 -695 0 -695 685))
|
|
(outline (path signal 120 -695 685 0 685))
|
|
(outline (path signal 50 -1150 1000 -1150 -16000))
|
|
(outline (path signal 50 -1150 -16000 1150 -16000))
|
|
(outline (path signal 50 1150 -16000 1150 1000))
|
|
(outline (path signal 50 1150 1000 -1150 1000))
|
|
(pin Rect[A]Pad_850x850_um 1 0 0)
|
|
(pin Oval[A]Pad_850x850_um 2 0 -1000)
|
|
(pin Oval[A]Pad_850x850_um 3 0 -2000)
|
|
(pin Oval[A]Pad_850x850_um 4 0 -3000)
|
|
(pin Oval[A]Pad_850x850_um 5 0 -4000)
|
|
(pin Oval[A]Pad_850x850_um 6 0 -5000)
|
|
(pin Oval[A]Pad_850x850_um 7 0 -6000)
|
|
(pin Oval[A]Pad_850x850_um 8 0 -7000)
|
|
(pin Oval[A]Pad_850x850_um 9 0 -8000)
|
|
(pin Oval[A]Pad_850x850_um 10 0 -9000)
|
|
(pin Oval[A]Pad_850x850_um 11 0 -10000)
|
|
(pin Oval[A]Pad_850x850_um 12 0 -11000)
|
|
(pin Oval[A]Pad_850x850_um 13 0 -12000)
|
|
(pin Oval[A]Pad_850x850_um 14 0 -13000)
|
|
(pin Oval[A]Pad_850x850_um 15 0 -14000)
|
|
(pin Oval[A]Pad_850x850_um 16 0 -15000)
|
|
)
|
|
(padstack Oval[A]Pad_1700x1700_um
|
|
(shape (path F.Cu 1700 0 0 0 0))
|
|
(shape (path B.Cu 1700 0 0 0 0))
|
|
(attach off)
|
|
)
|
|
(padstack Oval[A]Pad_850x850_um
|
|
(shape (path F.Cu 850 0 0 0 0))
|
|
(shape (path B.Cu 850 0 0 0 0))
|
|
(attach off)
|
|
)
|
|
(padstack Rect[T]Pad_2100x2800_um
|
|
(shape (rect F.Cu -1050 -1400 1050 1400))
|
|
(attach off)
|
|
)
|
|
(padstack Rect[T]Pad_700x2700_um
|
|
(shape (rect F.Cu -350 -1350 350 1350))
|
|
(attach off)
|
|
)
|
|
(padstack Rect[A]Pad_850x850_um
|
|
(shape (rect F.Cu -425 -425 425 425))
|
|
(shape (rect B.Cu -425 -425 425 425))
|
|
(attach off)
|
|
)
|
|
(padstack Rect[A]Pad_1700x1700_um
|
|
(shape (rect F.Cu -850 -850 850 850))
|
|
(shape (rect B.Cu -850 -850 850 850))
|
|
(attach off)
|
|
)
|
|
(padstack "Via[0-1]_600:400_um"
|
|
(shape (circle F.Cu 600))
|
|
(shape (circle B.Cu 600))
|
|
(attach off)
|
|
)
|
|
)
|
|
(network
|
|
(net "Net-(J1-Pad1)"
|
|
(pins J1-1)
|
|
)
|
|
(net "Net-(J1-Pad2)"
|
|
(pins J1-2)
|
|
)
|
|
(net GND
|
|
(pins J1-3 J2-8 J3-1 J4-1 J5-1 J6-1 J7-1)
|
|
)
|
|
(net Tx
|
|
(pins J1-4 J2-7)
|
|
)
|
|
(net Rx
|
|
(pins J1-5 J2-6)
|
|
)
|
|
(net RST
|
|
(pins J1-6 J2-5)
|
|
)
|
|
(net MOSI
|
|
(pins J1-7 J2-4)
|
|
)
|
|
(net SCK
|
|
(pins J1-8 J2-3)
|
|
)
|
|
(net MISO
|
|
(pins J1-9 J2-2)
|
|
)
|
|
(net VCC
|
|
(pins J1-10 J2-1 J3-16 J4-16 J5-16 J6-16 J7-16)
|
|
)
|
|
(net "Net-(J3-Pad2)"
|
|
(pins J3-2)
|
|
)
|
|
(net "Net-(J3-Pad3)"
|
|
(pins J3-3)
|
|
)
|
|
(net "Net-(J3-Pad4)"
|
|
(pins J3-4)
|
|
)
|
|
(net "Net-(J3-Pad5)"
|
|
(pins J3-5)
|
|
)
|
|
(net "Net-(J3-Pad6)"
|
|
(pins J3-6)
|
|
)
|
|
(net "Net-(J3-Pad7)"
|
|
(pins J3-7)
|
|
)
|
|
(net "Net-(J3-Pad8)"
|
|
(pins J3-8)
|
|
)
|
|
(net "Net-(J3-Pad9)"
|
|
(pins J3-9)
|
|
)
|
|
(net "Net-(J3-Pad10)"
|
|
(pins J3-10)
|
|
)
|
|
(net "Net-(J3-Pad11)"
|
|
(pins J3-11)
|
|
)
|
|
(net "Net-(J3-Pad12)"
|
|
(pins J3-12)
|
|
)
|
|
(net "Net-(J3-Pad13)"
|
|
(pins J3-13)
|
|
)
|
|
(net "Net-(J3-Pad14)"
|
|
(pins J3-14)
|
|
)
|
|
(net "Net-(J3-Pad15)"
|
|
(pins J3-15)
|
|
)
|
|
(net "Net-(J4-Pad2)"
|
|
(pins J4-2)
|
|
)
|
|
(net "Net-(J4-Pad3)"
|
|
(pins J4-3)
|
|
)
|
|
(net "Net-(J4-Pad4)"
|
|
(pins J4-4)
|
|
)
|
|
(net "Net-(J4-Pad5)"
|
|
(pins J4-5)
|
|
)
|
|
(net "Net-(J4-Pad6)"
|
|
(pins J4-6)
|
|
)
|
|
(net "Net-(J4-Pad7)"
|
|
(pins J4-7)
|
|
)
|
|
(net "Net-(J4-Pad8)"
|
|
(pins J4-8)
|
|
)
|
|
(net "Net-(J4-Pad9)"
|
|
(pins J4-9)
|
|
)
|
|
(net "Net-(J4-Pad10)"
|
|
(pins J4-10)
|
|
)
|
|
(net "Net-(J4-Pad11)"
|
|
(pins J4-11)
|
|
)
|
|
(net "Net-(J4-Pad12)"
|
|
(pins J4-12)
|
|
)
|
|
(net "Net-(J4-Pad13)"
|
|
(pins J4-13)
|
|
)
|
|
(net "Net-(J4-Pad14)"
|
|
(pins J4-14)
|
|
)
|
|
(net "Net-(J4-Pad15)"
|
|
(pins J4-15)
|
|
)
|
|
(net "Net-(J5-Pad2)"
|
|
(pins J5-2)
|
|
)
|
|
(net "Net-(J5-Pad3)"
|
|
(pins J5-3)
|
|
)
|
|
(net "Net-(J5-Pad4)"
|
|
(pins J5-4)
|
|
)
|
|
(net "Net-(J5-Pad5)"
|
|
(pins J5-5)
|
|
)
|
|
(net "Net-(J5-Pad6)"
|
|
(pins J5-6)
|
|
)
|
|
(net "Net-(J5-Pad7)"
|
|
(pins J5-7)
|
|
)
|
|
(net "Net-(J5-Pad8)"
|
|
(pins J5-8)
|
|
)
|
|
(net "Net-(J5-Pad9)"
|
|
(pins J5-9)
|
|
)
|
|
(net "Net-(J5-Pad10)"
|
|
(pins J5-10)
|
|
)
|
|
(net "Net-(J5-Pad11)"
|
|
(pins J5-11)
|
|
)
|
|
(net "Net-(J5-Pad12)"
|
|
(pins J5-12)
|
|
)
|
|
(net "Net-(J5-Pad13)"
|
|
(pins J5-13)
|
|
)
|
|
(net "Net-(J5-Pad14)"
|
|
(pins J5-14)
|
|
)
|
|
(net "Net-(J5-Pad15)"
|
|
(pins J5-15)
|
|
)
|
|
(net "Net-(J6-Pad2)"
|
|
(pins J6-2)
|
|
)
|
|
(net "Net-(J6-Pad3)"
|
|
(pins J6-3)
|
|
)
|
|
(net "Net-(J6-Pad4)"
|
|
(pins J6-4)
|
|
)
|
|
(net "Net-(J6-Pad5)"
|
|
(pins J6-5)
|
|
)
|
|
(net "Net-(J6-Pad6)"
|
|
(pins J6-6)
|
|
)
|
|
(net "Net-(J6-Pad7)"
|
|
(pins J6-7)
|
|
)
|
|
(net "Net-(J6-Pad8)"
|
|
(pins J6-8)
|
|
)
|
|
(net "Net-(J6-Pad9)"
|
|
(pins J6-9)
|
|
)
|
|
(net "Net-(J6-Pad10)"
|
|
(pins J6-10)
|
|
)
|
|
(net "Net-(J6-Pad11)"
|
|
(pins J6-11)
|
|
)
|
|
(net "Net-(J6-Pad12)"
|
|
(pins J6-12)
|
|
)
|
|
(net "Net-(J6-Pad13)"
|
|
(pins J6-13)
|
|
)
|
|
(net "Net-(J6-Pad14)"
|
|
(pins J6-14)
|
|
)
|
|
(net "Net-(J6-Pad15)"
|
|
(pins J6-15)
|
|
)
|
|
(net "Net-(J7-Pad2)"
|
|
(pins J7-2)
|
|
)
|
|
(net "Net-(J7-Pad3)"
|
|
(pins J7-3)
|
|
)
|
|
(net "Net-(J7-Pad4)"
|
|
(pins J7-4)
|
|
)
|
|
(net "Net-(J7-Pad5)"
|
|
(pins J7-5)
|
|
)
|
|
(net "Net-(J7-Pad6)"
|
|
(pins J7-6)
|
|
)
|
|
(net "Net-(J7-Pad7)"
|
|
(pins J7-7)
|
|
)
|
|
(net "Net-(J7-Pad8)"
|
|
(pins J7-8)
|
|
)
|
|
(net "Net-(J7-Pad9)"
|
|
(pins J7-9)
|
|
)
|
|
(net "Net-(J7-Pad10)"
|
|
(pins J7-10)
|
|
)
|
|
(net "Net-(J7-Pad11)"
|
|
(pins J7-11)
|
|
)
|
|
(net "Net-(J7-Pad12)"
|
|
(pins J7-12)
|
|
)
|
|
(net "Net-(J7-Pad13)"
|
|
(pins J7-13)
|
|
)
|
|
(net "Net-(J7-Pad14)"
|
|
(pins J7-14)
|
|
)
|
|
(net "Net-(J7-Pad15)"
|
|
(pins J7-15)
|
|
)
|
|
(class kicad_default "" GND MISO MOSI "Net-(J1-Pad1)" "Net-(J1-Pad2)"
|
|
"Net-(J3-Pad10)" "Net-(J3-Pad11)" "Net-(J3-Pad12)" "Net-(J3-Pad13)"
|
|
"Net-(J3-Pad14)" "Net-(J3-Pad15)" "Net-(J3-Pad2)" "Net-(J3-Pad3)" "Net-(J3-Pad4)"
|
|
"Net-(J3-Pad5)" "Net-(J3-Pad6)" "Net-(J3-Pad7)" "Net-(J3-Pad8)" "Net-(J3-Pad9)"
|
|
"Net-(J4-Pad10)" "Net-(J4-Pad11)" "Net-(J4-Pad12)" "Net-(J4-Pad13)"
|
|
"Net-(J4-Pad14)" "Net-(J4-Pad15)" "Net-(J4-Pad2)" "Net-(J4-Pad3)" "Net-(J4-Pad4)"
|
|
"Net-(J4-Pad5)" "Net-(J4-Pad6)" "Net-(J4-Pad7)" "Net-(J4-Pad8)" "Net-(J4-Pad9)"
|
|
"Net-(J5-Pad10)" "Net-(J5-Pad11)" "Net-(J5-Pad12)" "Net-(J5-Pad13)"
|
|
"Net-(J5-Pad14)" "Net-(J5-Pad15)" "Net-(J5-Pad2)" "Net-(J5-Pad3)" "Net-(J5-Pad4)"
|
|
"Net-(J5-Pad5)" "Net-(J5-Pad6)" "Net-(J5-Pad7)" "Net-(J5-Pad8)" "Net-(J5-Pad9)"
|
|
"Net-(J6-Pad10)" "Net-(J6-Pad11)" "Net-(J6-Pad12)" "Net-(J6-Pad13)"
|
|
"Net-(J6-Pad14)" "Net-(J6-Pad15)" "Net-(J6-Pad2)" "Net-(J6-Pad3)" "Net-(J6-Pad4)"
|
|
"Net-(J6-Pad5)" "Net-(J6-Pad6)" "Net-(J6-Pad7)" "Net-(J6-Pad8)" "Net-(J6-Pad9)"
|
|
"Net-(J7-Pad10)" "Net-(J7-Pad11)" "Net-(J7-Pad12)" "Net-(J7-Pad13)"
|
|
"Net-(J7-Pad14)" "Net-(J7-Pad15)" "Net-(J7-Pad2)" "Net-(J7-Pad3)" "Net-(J7-Pad4)"
|
|
"Net-(J7-Pad5)" "Net-(J7-Pad6)" "Net-(J7-Pad7)" "Net-(J7-Pad8)" "Net-(J7-Pad9)"
|
|
RST Rx SCK Tx VCC
|
|
(circuit
|
|
(use_via Via[0-1]_600:400_um)
|
|
)
|
|
(rule
|
|
(width 250)
|
|
(clearance 200.1)
|
|
)
|
|
)
|
|
)
|
|
(wiring
|
|
)
|
|
)
|