mirror of https://github.com/manuelbl/ttn-esp32
Improve SPI robustness (fix incompatibility with ESP32-S2)
parent
ee8eead337
commit
54a91a27db
2
Kconfig
2
Kconfig
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@ -51,7 +51,7 @@ endchoice
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config TTN_SPI_FREQ
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int "SPI frequency (in Hz)"
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default 10000000
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default 2000000
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help
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SPI frequency to communicate between ESP32 and SX127x radio chip
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@ -35,8 +35,8 @@ const char *devEui = "????????????????";
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const char *appKey = "????????????????????????????????";
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// Pins and other resources
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#define TTN_SPI_HOST HSPI_HOST
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#define TTN_SPI_DMA_CHAN 1
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#define TTN_SPI_HOST SPI2_HOST
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#define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
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#define TTN_PIN_SPI_SCLK 5
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#define TTN_PIN_SPI_MOSI 27
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#define TTN_PIN_SPI_MISO 19
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@ -36,8 +36,8 @@ const char *devEui = "????????????????";
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const char *appKey = "????????????????????????????????";
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// Pins and other resources
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#define TTN_SPI_HOST HSPI_HOST
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#define TTN_SPI_DMA_CHAN 1
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#define TTN_SPI_HOST SPI2_HOST
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#define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
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#define TTN_PIN_SPI_SCLK 5
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#define TTN_PIN_SPI_MOSI 27
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#define TTN_PIN_SPI_MISO 19
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@ -32,8 +32,8 @@ const char *devEui = "????????????????";
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const char *appKey = "????????????????????????????????";
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// Pins and other resources
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#define TTN_SPI_HOST HSPI_HOST
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#define TTN_SPI_DMA_CHAN 1
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#define TTN_SPI_HOST SPI2_HOST
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#define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
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#define TTN_PIN_SPI_SCLK 5
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#define TTN_PIN_SPI_MOSI 27
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#define TTN_PIN_SPI_MISO 19
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@ -32,8 +32,8 @@ const char *devEui = "????????????????";
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const char *appKey = "????????????????????????????????";
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// Pins and other resources
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#define TTN_SPI_HOST HSPI_HOST
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#define TTN_SPI_DMA_CHAN 1
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#define TTN_SPI_HOST SPI2_HOST
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#define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
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#define TTN_PIN_SPI_SCLK 5
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#define TTN_PIN_SPI_MOSI 27
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#define TTN_PIN_SPI_MISO 19
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@ -33,8 +33,8 @@ const char *appKey = "????????????????????????????????";
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// Pins and other resources
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#define TTN_SPI_HOST HSPI_HOST
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#define TTN_SPI_DMA_CHAN 1
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#define TTN_SPI_HOST SPI2_HOST
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#define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
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#define TTN_PIN_SPI_SCLK 5
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#define TTN_PIN_SPI_MOSI 27
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#define TTN_PIN_SPI_MISO 19
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@ -34,8 +34,8 @@ const char *appKey = "????????????????????????????????";
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// Pins and other resources
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#define TTN_SPI_HOST HSPI_HOST
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#define TTN_SPI_DMA_CHAN 1
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#define TTN_SPI_HOST SPI2_HOST
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#define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
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#define TTN_PIN_SPI_SCLK 5
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#define TTN_PIN_SPI_MOSI 27
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#define TTN_PIN_SPI_MISO 19
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@ -33,8 +33,8 @@ const char *devEui = "????????????????";
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const char *appKey = "????????????????????????????????";
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// Pins and other resources
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#define TTN_SPI_HOST HSPI_HOST
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#define TTN_SPI_DMA_CHAN 1
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#define TTN_SPI_HOST SPI2_HOST
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#define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
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#define TTN_PIN_SPI_SCLK 5
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#define TTN_PIN_SPI_MOSI 27
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#define TTN_PIN_SPI_MISO 19
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@ -34,8 +34,8 @@ const char *devEui = "????????????????";
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const char *appKey = "????????????????????????????????";
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// Pins and other resources
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#define TTN_SPI_HOST HSPI_HOST
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#define TTN_SPI_DMA_CHAN 1
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#define TTN_SPI_HOST SPI2_HOST
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#define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
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#define TTN_PIN_SPI_SCLK 5
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#define TTN_PIN_SPI_MOSI 27
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#define TTN_PIN_SPI_MISO 19
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@ -24,8 +24,8 @@
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// Pins and other resources
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#define TTN_SPI_HOST HSPI_HOST
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#define TTN_SPI_DMA_CHAN 1
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#define TTN_SPI_HOST SPI2_HOST
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#define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
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#define TTN_PIN_SPI_SCLK 5
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#define TTN_PIN_SPI_MOSI 27
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#define TTN_PIN_SPI_MISO 19
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@ -442,7 +442,7 @@ class TheThingsNetwork
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* Before calling this member function, the SPI bus needs to be configured using `spi_bus_initialize()`.
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* Additionally, `gpio_install_isr_service()` must have been called to initialize the GPIO ISR handler service.
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*
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* @param spi_host The SPI bus/peripherial to use (`SPI_HOST`, `HSPI_HOST` or `VSPI_HOST`).
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* @param spi_host The SPI bus/peripherial to use (`SPI1_HOST`, `SPI2_HOST`, `SPI3_HOST`, `FSPI_HOST`, `HSPI_HOST`, or `VSPI_HOST`).
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* @param nss The GPIO pin number connected to the radio chip's NSS pin (serving as the SPI chip select)
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* @param rxtx The GPIO pin number connected to the radio chip's RXTX pin (@ref TTN_NOT_CONNECTED if not
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* connected)
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@ -440,7 +440,7 @@ extern "C"
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*
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* Call this function after @ref ttn_init() and before all other TTN functions.
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*
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* @param spi_host The SPI bus/peripherial to use (`SPI_HOST`, `HSPI_HOST` or `VSPI_HOST`).
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* @param spi_host The SPI bus/peripherial to use (`SPI1_HOST`, `SPI2_HOST`, `SPI3_HOST`, `FSPI_HOST`, `HSPI_HOST`, or `VSPI_HOST`).
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* @param nss The GPIO pin number connected to the radio chip's NSS pin (serving as the SPI chip select)
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* @param rxtx The GPIO pin number connected to the radio chip's RXTX pin (@ref TTN_NOT_CONNECTED if not
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* connected)
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@ -110,37 +110,42 @@ void IRAM_ATTR qio_irq_handler(void *arg)
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void init_io(void)
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{
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// pin_nss and pin_dio0 and pin_dio1 are required
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// pin_nss, pin_dio0 and pin_dio1 are required
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ASSERT(pin_nss != LMIC_UNUSED_PIN);
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ASSERT(pin_dio0 != LMIC_UNUSED_PIN);
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ASSERT(pin_dio1 != LMIC_UNUSED_PIN);
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gpio_reset_pin(pin_nss);
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gpio_set_level(pin_nss, 0);
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gpio_set_direction(pin_nss, GPIO_MODE_OUTPUT);
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gpio_config_t output_pin_config = {
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.pin_bit_mask = BIT64(pin_nss),
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.mode = GPIO_MODE_OUTPUT,
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.pull_up_en = false,
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.pull_down_en = false,
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.intr_type = GPIO_INTR_DISABLE
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};
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if (pin_rx_tx != LMIC_UNUSED_PIN)
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{
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gpio_reset_pin(pin_rx_tx);
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gpio_set_level(pin_rx_tx, 0);
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gpio_set_direction(pin_rx_tx, GPIO_MODE_OUTPUT);
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}
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output_pin_config.pin_bit_mask |= BIT64(pin_rx_tx);
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if (pin_rst != LMIC_UNUSED_PIN)
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{
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gpio_reset_pin(pin_rst);
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output_pin_config.pin_bit_mask |= BIT64(pin_rst);
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gpio_config(&output_pin_config);
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gpio_set_level(pin_nss, 1);
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if (pin_rx_tx != LMIC_UNUSED_PIN)
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gpio_set_level(pin_rx_tx, 0);
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if (pin_rst != LMIC_UNUSED_PIN)
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gpio_set_level(pin_rst, 0);
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gpio_set_direction(pin_rst, GPIO_MODE_OUTPUT);
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}
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// DIO pins with interrupt handlers
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gpio_reset_pin(pin_dio0);
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gpio_set_direction(pin_dio0, GPIO_MODE_INPUT);
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gpio_set_intr_type(pin_dio0, GPIO_INTR_POSEDGE);
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gpio_reset_pin(pin_dio1);
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gpio_set_direction(pin_dio1, GPIO_MODE_INPUT);
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gpio_set_intr_type(pin_dio1, GPIO_INTR_POSEDGE);
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gpio_config_t input_pin_config = {
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.pin_bit_mask = BIT64(pin_dio0) | BIT64(pin_dio1),
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.mode = GPIO_MODE_INPUT,
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.pull_up_en = false,
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.pull_down_en = true,
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.intr_type = GPIO_INTR_POSEDGE,
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};
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gpio_config(&input_pin_config);
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ESP_LOGI(TAG, "IO initialized");
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}
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@ -172,7 +177,6 @@ void hal_pin_rst(u1_t val)
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gpio_set_direction(pin_rst, GPIO_MODE_OUTPUT);
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#else
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// keep pin floating
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gpio_set_level(pin_rst, val);
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gpio_set_direction(pin_rst, GPIO_MODE_INPUT);
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#endif
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}
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@ -207,13 +211,12 @@ void init_spi(void)
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{
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// init device
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spi_device_interface_config_t spi_config = {
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.mode = 1,
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.mode = 0,
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.clock_speed_hz = CONFIG_TTN_SPI_FREQ,
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.command_bits = 0,
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.address_bits = 8,
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.spics_io_num = pin_nss,
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.spics_io_num = -1,
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.queue_size = 1,
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.cs_ena_posttrans = 2
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};
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esp_err_t ret = spi_bus_add_device(spi_host, &spi_config, &spi_handle);
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@ -224,16 +227,22 @@ void init_spi(void)
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void hal_spi_write(u1_t cmd, const u1_t *buf, size_t len)
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{
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gpio_set_level(pin_nss, 0);
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memset(&spi_transaction, 0, sizeof(spi_transaction));
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spi_transaction.addr = cmd;
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spi_transaction.length = 8 * len;
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spi_transaction.tx_buffer = buf;
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esp_err_t err = spi_device_transmit(spi_handle, &spi_transaction);
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ESP_ERROR_CHECK(err);
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gpio_set_level(pin_nss, 1);
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}
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void hal_spi_read(u1_t cmd, u1_t *buf, size_t len)
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{
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gpio_set_level(pin_nss, 0);
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memset(buf, 0, len);
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memset(&spi_transaction, 0, sizeof(spi_transaction));
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spi_transaction.addr = cmd;
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spi_transaction.rx_buffer = buf;
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esp_err_t err = spi_device_transmit(spi_handle, &spi_transaction);
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ESP_ERROR_CHECK(err);
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gpio_set_level(pin_nss, 1);
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}
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