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Improve SPI robustness (fix incompatibility with ESP32-S2)

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This commit is contained in:
Manuel Bleichenbacher
2022-03-26 20:06:03 +01:00
parent ee8eead337
commit 54a91a27db
13 changed files with 56 additions and 45 deletions
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2
Kconfig
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@ -51,7 +51,7 @@ endchoice
config TTN_SPI_FREQ config TTN_SPI_FREQ
int "SPI frequency (in Hz)" int "SPI frequency (in Hz)"
default 10000000 default 2000000
help help
SPI frequency to communicate between ESP32 and SX127x radio chip SPI frequency to communicate between ESP32 and SX127x radio chip

4
examples/deep_sleep/main/main.cpp
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@ -35,8 +35,8 @@ const char *devEui = "????????????????";
const char *appKey = "????????????????????????????????"; const char *appKey = "????????????????????????????????";
// Pins and other resources // Pins and other resources
#define TTN_SPI_HOST HSPI_HOST #define TTN_SPI_HOST SPI2_HOST
#define TTN_SPI_DMA_CHAN 1 #define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
#define TTN_PIN_SPI_SCLK 5 #define TTN_PIN_SPI_SCLK 5
#define TTN_PIN_SPI_MOSI 27 #define TTN_PIN_SPI_MOSI 27
#define TTN_PIN_SPI_MISO 19 #define TTN_PIN_SPI_MISO 19

4
examples/deep_sleep_in_c/main/main.c
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@ -36,8 +36,8 @@ const char *devEui = "????????????????";
const char *appKey = "????????????????????????????????"; const char *appKey = "????????????????????????????????";
// Pins and other resources // Pins and other resources
#define TTN_SPI_HOST HSPI_HOST #define TTN_SPI_HOST SPI2_HOST
#define TTN_SPI_DMA_CHAN 1 #define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
#define TTN_PIN_SPI_SCLK 5 #define TTN_PIN_SPI_SCLK 5
#define TTN_PIN_SPI_MOSI 27 #define TTN_PIN_SPI_MOSI 27
#define TTN_PIN_SPI_MISO 19 #define TTN_PIN_SPI_MISO 19

4
examples/hello_world/main/main.cpp
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@ -32,8 +32,8 @@ const char *devEui = "????????????????";
const char *appKey = "????????????????????????????????"; const char *appKey = "????????????????????????????????";
// Pins and other resources // Pins and other resources
#define TTN_SPI_HOST HSPI_HOST #define TTN_SPI_HOST SPI2_HOST
#define TTN_SPI_DMA_CHAN 1 #define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
#define TTN_PIN_SPI_SCLK 5 #define TTN_PIN_SPI_SCLK 5
#define TTN_PIN_SPI_MOSI 27 #define TTN_PIN_SPI_MOSI 27
#define TTN_PIN_SPI_MISO 19 #define TTN_PIN_SPI_MISO 19

4
examples/hello_world_in_c/main/main.c
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@ -32,8 +32,8 @@ const char *devEui = "????????????????";
const char *appKey = "????????????????????????????????"; const char *appKey = "????????????????????????????????";
// Pins and other resources // Pins and other resources
#define TTN_SPI_HOST HSPI_HOST #define TTN_SPI_HOST SPI2_HOST
#define TTN_SPI_DMA_CHAN 1 #define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
#define TTN_PIN_SPI_SCLK 5 #define TTN_PIN_SPI_SCLK 5
#define TTN_PIN_SPI_MOSI 27 #define TTN_PIN_SPI_MOSI 27
#define TTN_PIN_SPI_MISO 19 #define TTN_PIN_SPI_MISO 19

4
examples/mac_address/main/main.cpp
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@ -33,8 +33,8 @@ const char *appKey = "????????????????????????????????";
// Pins and other resources // Pins and other resources
#define TTN_SPI_HOST HSPI_HOST #define TTN_SPI_HOST SPI2_HOST
#define TTN_SPI_DMA_CHAN 1 #define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
#define TTN_PIN_SPI_SCLK 5 #define TTN_PIN_SPI_SCLK 5
#define TTN_PIN_SPI_MOSI 27 #define TTN_PIN_SPI_MOSI 27
#define TTN_PIN_SPI_MISO 19 #define TTN_PIN_SPI_MISO 19

4
examples/monitoring/main/main.cpp
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@ -34,8 +34,8 @@ const char *appKey = "????????????????????????????????";
// Pins and other resources // Pins and other resources
#define TTN_SPI_HOST HSPI_HOST #define TTN_SPI_HOST SPI2_HOST
#define TTN_SPI_DMA_CHAN 1 #define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
#define TTN_PIN_SPI_SCLK 5 #define TTN_PIN_SPI_SCLK 5
#define TTN_PIN_SPI_MOSI 27 #define TTN_PIN_SPI_MOSI 27
#define TTN_PIN_SPI_MISO 19 #define TTN_PIN_SPI_MISO 19

4
examples/power_off/main/main.cpp
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@ -33,8 +33,8 @@ const char *devEui = "????????????????";
const char *appKey = "????????????????????????????????"; const char *appKey = "????????????????????????????????";
// Pins and other resources // Pins and other resources
#define TTN_SPI_HOST HSPI_HOST #define TTN_SPI_HOST SPI2_HOST
#define TTN_SPI_DMA_CHAN 1 #define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
#define TTN_PIN_SPI_SCLK 5 #define TTN_PIN_SPI_SCLK 5
#define TTN_PIN_SPI_MOSI 27 #define TTN_PIN_SPI_MOSI 27
#define TTN_PIN_SPI_MISO 19 #define TTN_PIN_SPI_MISO 19

4
examples/power_off_in_c/main/main.c
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@ -34,8 +34,8 @@ const char *devEui = "????????????????";
const char *appKey = "????????????????????????????????"; const char *appKey = "????????????????????????????????";
// Pins and other resources // Pins and other resources
#define TTN_SPI_HOST HSPI_HOST #define TTN_SPI_HOST SPI2_HOST
#define TTN_SPI_DMA_CHAN 1 #define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
#define TTN_PIN_SPI_SCLK 5 #define TTN_PIN_SPI_SCLK 5
#define TTN_PIN_SPI_MOSI 27 #define TTN_PIN_SPI_MOSI 27
#define TTN_PIN_SPI_MISO 19 #define TTN_PIN_SPI_MISO 19

4
examples/provisioning/main/main.cpp
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@ -24,8 +24,8 @@
// Pins and other resources // Pins and other resources
#define TTN_SPI_HOST HSPI_HOST #define TTN_SPI_HOST SPI2_HOST
#define TTN_SPI_DMA_CHAN 1 #define TTN_SPI_DMA_CHAN SPI_DMA_DISABLED
#define TTN_PIN_SPI_SCLK 5 #define TTN_PIN_SPI_SCLK 5
#define TTN_PIN_SPI_MOSI 27 #define TTN_PIN_SPI_MOSI 27
#define TTN_PIN_SPI_MISO 19 #define TTN_PIN_SPI_MISO 19

2
include/TheThingsNetwork.h
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@ -442,7 +442,7 @@ class TheThingsNetwork
* Before calling this member function, the SPI bus needs to be configured using `spi_bus_initialize()`. * Before calling this member function, the SPI bus needs to be configured using `spi_bus_initialize()`.
* Additionally, `gpio_install_isr_service()` must have been called to initialize the GPIO ISR handler service. * Additionally, `gpio_install_isr_service()` must have been called to initialize the GPIO ISR handler service.
* *
* @param spi_host The SPI bus/peripherial to use (`SPI_HOST`, `HSPI_HOST` or `VSPI_HOST`). * @param spi_host The SPI bus/peripherial to use (`SPI1_HOST`, `SPI2_HOST`, `SPI3_HOST`, `FSPI_HOST`, `HSPI_HOST`, or `VSPI_HOST`).
* @param nss The GPIO pin number connected to the radio chip's NSS pin (serving as the SPI chip select) * @param nss The GPIO pin number connected to the radio chip's NSS pin (serving as the SPI chip select)
* @param rxtx The GPIO pin number connected to the radio chip's RXTX pin (@ref TTN_NOT_CONNECTED if not * @param rxtx The GPIO pin number connected to the radio chip's RXTX pin (@ref TTN_NOT_CONNECTED if not
* connected) * connected)

2
include/ttn.h
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@ -440,7 +440,7 @@ extern "C"
* *
* Call this function after @ref ttn_init() and before all other TTN functions. * Call this function after @ref ttn_init() and before all other TTN functions.
* *
* @param spi_host The SPI bus/peripherial to use (`SPI_HOST`, `HSPI_HOST` or `VSPI_HOST`). * @param spi_host The SPI bus/peripherial to use (`SPI1_HOST`, `SPI2_HOST`, `SPI3_HOST`, `FSPI_HOST`, `HSPI_HOST`, or `VSPI_HOST`).
* @param nss The GPIO pin number connected to the radio chip's NSS pin (serving as the SPI chip select) * @param nss The GPIO pin number connected to the radio chip's NSS pin (serving as the SPI chip select)
* @param rxtx The GPIO pin number connected to the radio chip's RXTX pin (@ref TTN_NOT_CONNECTED if not * @param rxtx The GPIO pin number connected to the radio chip's RXTX pin (@ref TTN_NOT_CONNECTED if not
* connected) * connected)

59
src/hal/hal_esp32.c
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@ -110,37 +110,42 @@ void IRAM_ATTR qio_irq_handler(void *arg)
void init_io(void) void init_io(void)
{ {
// pin_nss and pin_dio0 and pin_dio1 are required // pin_nss, pin_dio0 and pin_dio1 are required
ASSERT(pin_nss != LMIC_UNUSED_PIN); ASSERT(pin_nss != LMIC_UNUSED_PIN);
ASSERT(pin_dio0 != LMIC_UNUSED_PIN); ASSERT(pin_dio0 != LMIC_UNUSED_PIN);
ASSERT(pin_dio1 != LMIC_UNUSED_PIN); ASSERT(pin_dio1 != LMIC_UNUSED_PIN);
gpio_reset_pin(pin_nss); gpio_config_t output_pin_config = {
gpio_set_level(pin_nss, 0); .pin_bit_mask = BIT64(pin_nss),
gpio_set_direction(pin_nss, GPIO_MODE_OUTPUT); .mode = GPIO_MODE_OUTPUT,
.pull_up_en = false,
.pull_down_en = false,
.intr_type = GPIO_INTR_DISABLE
};
if (pin_rx_tx != LMIC_UNUSED_PIN) if (pin_rx_tx != LMIC_UNUSED_PIN)
{ output_pin_config.pin_bit_mask |= BIT64(pin_rx_tx);
gpio_reset_pin(pin_rx_tx);
gpio_set_level(pin_rx_tx, 0);
gpio_set_direction(pin_rx_tx, GPIO_MODE_OUTPUT);
}
if (pin_rst != LMIC_UNUSED_PIN) if (pin_rst != LMIC_UNUSED_PIN)
{ output_pin_config.pin_bit_mask |= BIT64(pin_rst);
gpio_reset_pin(pin_rst);
gpio_config(&output_pin_config);
gpio_set_level(pin_nss, 1);
if (pin_rx_tx != LMIC_UNUSED_PIN)
gpio_set_level(pin_rx_tx, 0);
if (pin_rst != LMIC_UNUSED_PIN)
gpio_set_level(pin_rst, 0); gpio_set_level(pin_rst, 0);
gpio_set_direction(pin_rst, GPIO_MODE_OUTPUT);
}
// DIO pins with interrupt handlers // DIO pins with interrupt handlers
gpio_reset_pin(pin_dio0); gpio_config_t input_pin_config = {
gpio_set_direction(pin_dio0, GPIO_MODE_INPUT); .pin_bit_mask = BIT64(pin_dio0) | BIT64(pin_dio1),
gpio_set_intr_type(pin_dio0, GPIO_INTR_POSEDGE); .mode = GPIO_MODE_INPUT,
.pull_up_en = false,
gpio_reset_pin(pin_dio1); .pull_down_en = true,
gpio_set_direction(pin_dio1, GPIO_MODE_INPUT); .intr_type = GPIO_INTR_POSEDGE,
gpio_set_intr_type(pin_dio1, GPIO_INTR_POSEDGE); };
gpio_config(&input_pin_config);
ESP_LOGI(TAG, "IO initialized"); ESP_LOGI(TAG, "IO initialized");
} }
@ -172,7 +177,6 @@ void hal_pin_rst(u1_t val)
gpio_set_direction(pin_rst, GPIO_MODE_OUTPUT); gpio_set_direction(pin_rst, GPIO_MODE_OUTPUT);
#else #else
// keep pin floating // keep pin floating
gpio_set_level(pin_rst, val);
gpio_set_direction(pin_rst, GPIO_MODE_INPUT); gpio_set_direction(pin_rst, GPIO_MODE_INPUT);
#endif #endif
} }
@ -207,13 +211,12 @@ void init_spi(void)
{ {
// init device // init device
spi_device_interface_config_t spi_config = { spi_device_interface_config_t spi_config = {
.mode = 1, .mode = 0,
.clock_speed_hz = CONFIG_TTN_SPI_FREQ, .clock_speed_hz = CONFIG_TTN_SPI_FREQ,
.command_bits = 0, .command_bits = 0,
.address_bits = 8, .address_bits = 8,
.spics_io_num = pin_nss, .spics_io_num = -1,
.queue_size = 1, .queue_size = 1,
.cs_ena_posttrans = 2
}; };
esp_err_t ret = spi_bus_add_device(spi_host, &spi_config, &spi_handle); esp_err_t ret = spi_bus_add_device(spi_host, &spi_config, &spi_handle);
@ -224,16 +227,22 @@ void init_spi(void)
void hal_spi_write(u1_t cmd, const u1_t *buf, size_t len) void hal_spi_write(u1_t cmd, const u1_t *buf, size_t len)
{ {
gpio_set_level(pin_nss, 0);
memset(&spi_transaction, 0, sizeof(spi_transaction)); memset(&spi_transaction, 0, sizeof(spi_transaction));
spi_transaction.addr = cmd; spi_transaction.addr = cmd;
spi_transaction.length = 8 * len; spi_transaction.length = 8 * len;
spi_transaction.tx_buffer = buf; spi_transaction.tx_buffer = buf;
esp_err_t err = spi_device_transmit(spi_handle, &spi_transaction); esp_err_t err = spi_device_transmit(spi_handle, &spi_transaction);
ESP_ERROR_CHECK(err); ESP_ERROR_CHECK(err);
gpio_set_level(pin_nss, 1);
} }
void hal_spi_read(u1_t cmd, u1_t *buf, size_t len) void hal_spi_read(u1_t cmd, u1_t *buf, size_t len)
{ {
gpio_set_level(pin_nss, 0);
memset(buf, 0, len); memset(buf, 0, len);
memset(&spi_transaction, 0, sizeof(spi_transaction)); memset(&spi_transaction, 0, sizeof(spi_transaction));
spi_transaction.addr = cmd; spi_transaction.addr = cmd;
@ -243,6 +252,8 @@ void hal_spi_read(u1_t cmd, u1_t *buf, size_t len)
spi_transaction.rx_buffer = buf; spi_transaction.rx_buffer = buf;
esp_err_t err = spi_device_transmit(spi_handle, &spi_transaction); esp_err_t err = spi_device_transmit(spi_handle, &spi_transaction);
ESP_ERROR_CHECK(err); ESP_ERROR_CHECK(err);
gpio_set_level(pin_nss, 1);
} }